1. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  2. 28 Sep, 2018 1 commit
  3. 30 Aug, 2018 1 commit
  4. 28 Feb, 2018 1 commit
  5. 16 Oct, 2017 2 commits
    • Jeenu Viswambharan's avatar
      GIC: Allow specifying interrupt properties · c639e8eb
      Jeenu Viswambharan authored
      
      
      The GIC driver initialization currently allows an array of interrupts to
      be configured as secure. Future use cases would require more interrupt
      configuration other than just security, such as priority.
      
      This patch introduces a new interrupt property array as part of both
      GICv2 and GICv3 driver data. The platform can populate the array with
      interrupt numbers and respective properties. The corresponding driver
      initialization iterates through the array, and applies interrupt
      configuration as required.
      
      This capability, and the current way of supplying array (or arrays, in
      case of GICv3) of secure interrupts, are however mutually exclusive.
      Henceforth, the platform should supply either:
      
        - A list of interrupts to be mapped as secure (the current way).
          Platforms that do this will continue working as they were. With this
          patch, this scheme is deprecated.
      
        - A list of interrupt properties (properties include interrupt group).
          Individual interrupt properties are specified via. descriptors of
          type 'interrupt_prop_desc_t', which can be populated with the macro
          INTR_PROP_DESC().
      
      A run time assert checks that the platform doesn't specify both.
      
      Henceforth the old scheme of providing list of secure interrupts is
      deprecated. When built with ERROR_DEPRECATED=1, GIC drivers will require
      that the interrupt properties are supplied instead of an array of secure
      interrupts.
      
      Add a section to firmware design about configuring secure interrupts.
      
      Fixes ARM-software/tf-issues#262
      
      Change-Id: I8eec29e72eb69dbb6bce77879febf32c95376942
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      c639e8eb
    • Jeenu Viswambharan's avatar
      GIC: Add API to set interrupt routing · fc529fee
      Jeenu Viswambharan authored
      
      
      SPIs can be routed to either a specific PE, or to any one of all
      available PEs.
      
      API documentation updated.
      
      Change-Id: I28675f634568aaf4ea1aa8aa7ebf25b419a963ed
      Co-authored-by: default avatarYousuf A <yousuf.sait@arm.com>
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      fc529fee
  6. 03 May, 2017 1 commit
  7. 09 Feb, 2016 3 commits
    • Soby Mathew's avatar
      Move private APIs in gic_common.h to a private header · e9ec3cec
      Soby Mathew authored
      This patch moves the private GIC common accessors from `gic_common.h` to
      a new private header file `gic_common_private.h`. This patch also adds
      additional comments to GIC register accessors to highlight the fact
      that some of them access register values that correspond to multiple
      interrupt IDs. The convention used is that the `set`, `get` and `clr`
      accessors access and modify the values corresponding to a single interrupt
      ID whereas the `read` and `write` GIC register accessors access the raw
      GIC registers and it could correspond to multiple interrupt IDs depending
      on the register accessed.
      
      Change-Id: I2643ecb2533f01e3d3219fcedfb5f80c120622f9
      e9ec3cec
    • Soby Mathew's avatar
      Fix GIC_IPRIORITYR setting in new drivers · 38a78614
      Soby Mathew authored
      The code to set the interrupt priority for secure interrupts in the
      new GICv2 and GICv3 drivers is incorrect. The setup code to configure
      interrupt priorities of secure interrupts, one interrupt at a time, used
      gicd_write_ipriorityr()/gicr_write_ipriority() function affecting
      4 interrupts at a time. This bug did not manifest itself because all the
      secure interrupts were configured to the highest secure priority(0) during
      cold boot and the adjacent non secure interrupt priority would be configured
      later by the normal world. This patch introduces new accessors,
      gicd_set_ipriorityr() and gicr_set_ipriorityr(), for configuring priority
      one interrupt at a time and fixes the the setup code to use the new
      accessors.
      
      Fixes ARM-software/tf-issues#344
      
      Change-Id: I470fd74d2b7fce7058b55d83f604be05a27e1341
      38a78614
    • Soby Mathew's avatar
      Fix race in GIC IPRIORITY and ITARGET accessors · a91e12fb
      Soby Mathew authored
      GICD_IPRIORITYR and GICD_ITARGETSR specifically support byte addressing
      so that individual interrupt priorities can be atomically updated by
      issuing a single byte write. The previous implementation of
      gicd_set_ipriority() and gicd_set_itargetsr() used 32-bit register
      accesses, modifying values for 4 interrupts at a time, using a
      read-modify-write approach. This potentially may cause concurrent changes
      by other CPUs to the adjacent interrupts to be corrupted. This patch fixes
      the issue by modifying these accessors to use byte addressing.
      
      Fixes ARM-software/tf-issues#343
      
      Change-Id: Iec28b5f5074045b00dfb8d5f5339b685f9425915
      a91e12fb
  8. 26 Nov, 2015 1 commit
    • Soby Mathew's avatar
      Add ARM GICv2 driver · 464ce2bb
      Soby Mathew authored
      This patch adds a driver for ARM GICv2 systems, example GIC-400. Unlike
      the existing GIC driver in `include/drivers/arm/arm_gic.h`, this driver
      is optimised for GICv2 and does not support GICv3 systems in GICv2
      compatibility mode. The driver interface has been implemented in
      `drivers/arm/gic/v2/gicv2_main.c`. The corresponding header is in
      `include/drivers/arm/gicv2.h`. Helper functions are implemented in
      `drivers/arm/gic/v2/gicv2_helpers.c` and are accessible through the
      `drivers/arm/gic/v2/gicv2_private.h` header.
      
      Change-Id: I09fffa4e621fb99ba3c01204839894816cd89a2a
      464ce2bb