1. 09 Apr, 2015 1 commit
  2. 08 Apr, 2015 1 commit
    • Kévin Petit's avatar
      Add support to indicate size and end of assembly functions · 8b779620
      Kévin Petit authored
      
      
      In order for the symbol table in the ELF file to contain the size of
      functions written in assembly, it is necessary to report it to the
      assembler using the .size directive.
      
      To fulfil the above requirements, this patch introduces an 'endfunc'
      macro which contains the .endfunc and .size directives. It also adds
      a .func directive to the 'func' assembler macro.
      
      The .func/.endfunc have been used so the assembler can fail if
      endfunc is omitted.
      
      Fixes ARM-Software/tf-issues#295
      
      Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
      Signed-off-by: default avatarKévin Petit <kevin.petit@arm.com>
      8b779620
  3. 01 Apr, 2015 3 commits
  4. 31 Mar, 2015 6 commits
  5. 27 Mar, 2015 2 commits
    • Soby Mathew's avatar
      Remove the `owner` field in bakery_lock_t data structure · 548579f5
      Soby Mathew authored
      This patch removes the `owner` field in bakery_lock_t structure which
      is the data structure used in the bakery lock implementation that uses
      coherent memory. The assertions to protect against recursive lock
      acquisition were based on the 'owner' field. They are now done based
      on the bakery lock ticket number. These assertions are also added
      to the bakery lock implementation that uses normal memory as well.
      
      Change-Id: If4850a00dffd3977e218c0f0a8d145808f36b470
      548579f5
    • Soby Mathew's avatar
      Optimize the bakery lock structure for coherent memory · 1c9573a1
      Soby Mathew authored
      This patch optimizes the data structure used with the bakery lock
      implementation for coherent memory to save memory and minimize memory
      accesses. These optimizations were already part of the bakery lock
      implementation for normal memory and this patch now implements
      it for the coherent memory implementation as well. Also
      included in the patch is a cleanup to use the do-while loop while
      waiting for other contenders to finish choosing their tickets.
      
      Change-Id: Iedb305473133dc8f12126726d8329b67888b70f1
      1c9573a1
  6. 26 Mar, 2015 3 commits
  7. 24 Mar, 2015 1 commit
    • Sandrine Bailleux's avatar
      Add support for Juno r1 in the platform reset handler · 9454d316
      Sandrine Bailleux authored
      For Juno r0, the platform reset handler needs to:
       - Implement the workaround for defect #831273
       - Increase the L2 Data and Tag RAM latencies for Cortex-A57.
      
      Defect #831273 does not affect Juno r1. Also, the default value
      for the L2 Tag RAM latency for Cortex-A57 is suitable on Juno r1.
      The L2 Data RAM latency for Cortex-A57 still needs to be
      increased, though.
      
      This patch modifies the Juno platform reset handler to detect
      the board revision and skip the unnecessary steps on Juno r1.
      The behaviour on Juno r0 is unchanged.
      
      Change-Id: I27542917223e680ef923ee860900806ffcd0357b
      9454d316
  8. 20 Mar, 2015 1 commit
    • Achin Gupta's avatar
      Set group status of PPIs and SGIs correctly on GICv3 systems · 8cfc3fd2
      Achin Gupta authored
      On a GICv2 system, the group status of PPIs and SGIs is set in the GICD_IGROUPR0
      register. On a GICv3 system, if affinity routing is enabled for the non-secure
      state, then the group status of PPIs and SGIs should be set in the GICR_IGROUPR0
      register. ARM Trusted firmware sets the group status using the GICv2
      sequence. On a GICv3 system, if the group status of an interrupt is set to Group
      1 through a write to the GICD_IGROUPR0, then the GICR_IGROUPR0 is updated as
      well.
      
      The current sequence is incorrect since it first marks all PPIs and SGIs as
      Group 1. It then clears the bits in GICD_IGROUPR0 corresponding to secure
      interrupts to set their group status to Group 0. This operation is a no-op. It
      leaves the secure generic timer interrupt (#29) used by the TSP marked as Group
      1. This causes the interrupt to interfere with the execution of non-secure
      software. Once an interrupt has been marked as Group 1, the GICR_IGROUPR0 should
      be programmed to change its group status.
      
      This patch rectifies this issue by setting the group status of only the
      non-secure PPI and SGIs to Group 1 in the first place. GICD_IGROUPR0 resets to
      0. So secure interrupts are marked as Group 0 by default.
      
      Change-Id: I958b4b15f3e2b2444ce4c17764def36216498d00
      8cfc3fd2
  9. 19 Mar, 2015 1 commit
  10. 18 Mar, 2015 1 commit
  11. 17 Mar, 2015 8 commits
  12. 16 Mar, 2015 3 commits
    • Vikram Kanigiri's avatar
      Use ARM CCI driver on FVP and Juno platforms · 4991ecdc
      Vikram Kanigiri authored
      This patch updates the FVP and Juno platform ports to use the common
      driver for ARM Cache Coherent Interconnects.
      
      Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
      4991ecdc
    • Vikram Kanigiri's avatar
      Common driver for ARM Cache Coherent Interconnects · 23e47ede
      Vikram Kanigiri authored
      Even though both CCI-400 and CCI-500 IPs have different configurations
      with respect to the number and types of supported interfaces, their
      register offsets and programming sequences are similar. This patch
      creates a common driver for enabling and disabling snoop transactions
      and DVMs with both the IPs.
      
      New platform ports which implement one of these IPs should use this
      common driver. Existing platform ports which implement CCI-400 should
      migrate to the common driver as the standalone CCI-400 will be
      deprecated in the future.
      
      Change-Id: I3ccd0eb7b062922d2e4a374ff8c21e79fa357556
      23e47ede
    • Vikram Kanigiri's avatar
      Add macro to calculate number of elements in an array · a7e98ad5
      Vikram Kanigiri authored
      This patch defines the ARRAY_SIZE macro for calculating number of elements
      in an array and uses it where appropriate.
      
      Change-Id: I72746a9229f0b259323972b498b9a3999731bc9b
      a7e98ad5
  13. 13 Mar, 2015 1 commit
    • Vikram Kanigiri's avatar
      Initialise cpu ops after enabling data cache · 12e7c4ab
      Vikram Kanigiri authored
      The cpu-ops pointer was initialized before enabling the data cache in the cold
      and warm boot paths. This required a DCIVAC cache maintenance operation to
      invalidate any stale cache lines resident in other cpus.
      
      This patch moves this initialization to the bl31_arch_setup() function
      which is always called after the data cache and MMU has been enabled.
      
      This change removes the need:
       1. for the DCIVAC cache maintenance operation.
       2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND
          call since memory contents are always preserved in this case.
      
      Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6
      12e7c4ab
  14. 11 Mar, 2015 3 commits
    • Juan Castillo's avatar
      checkpatch: ignore GIT_COMMIT_ID · 9b4ee6b3
      Juan Castillo authored
      By default, the checkpatch script requires that commit references
      included in commit messages follow a predefined format. Github
      merge commits do not follow this convention, causing the code
      style test to fail when a new pull request is created.
      
      This patch adds the ignore GIT_COMMIT_ID option to the checkpatch
      parameters. This flag indicates the tool to ignore the commit
      message format.
      
      Change-Id: I37133cc5cf803f664b8ff00f62d458b39f06918c
      9b4ee6b3
    • Sandrine Bailleux's avatar
      Juno: Disable workaround for Cortex-A57 erratum #806969 · 9cda6a94
      Sandrine Bailleux authored
      Cortex-A57 erratum #806969 applies to revision r0p0 of the CPU
      but does not manifest itself on Juno r0. It is not applicable
      to Juno r1 in any case.
      
      This patch modifies the Juno platform Makefile to no longer
      compile this erratum workaround in.
      
      Change-Id: I32b16835b2ac897e639e869ab2b78b62a51a0139
      9cda6a94
    • Juan Castillo's avatar
      TBB: remove PolarSSL SHA1 functions from the binary · 81ee0983
      Juan Castillo authored
      Commit ea4ec3aa ("TBB: use SHA256 to generate the certificate
      signatures") updated the cert_create tool to generate the
      signatures using SHA256 instead of SHA1. Therefore, SHA1 is no
      longer required.
      
      This patch removes the SHA1 option from the PolarSSL configuration
      file. The source file sha1.c is no longer needed and has been
      excluded from the build. The SHA1 functions are no longer included
      in the binary, reducing the memory footprint of BL1 and BL2 by
      approximately 6 KB.
      
      Change-Id: I72ea2cff03c0964c3eaadce148ec2ad2c6dde2e3
      81ee0983
  15. 10 Mar, 2015 2 commits
    • Sandrine Bailleux's avatar
      User guide: Add dependency on libssl-dev for cert_create tool · 4da85bb0
      Sandrine Bailleux authored
      The 'libssl-dev' package must be installed on the host to build the
      certificate generation tool. This patch adds it to the list of
      required tools in the User Guide.
      
      Change-Id: I018381fb14b7c2d2bd6f2b7929aaad0571f7eb2e
      4da85bb0
    • Sandrine Bailleux's avatar
      Update help message printed by the Makefile · 1b578596
      Sandrine Bailleux authored
      The message printed by 'make help' is incomplete. It doesn't
      mention all relevant supported targets. This patch updates it.
      
      The format of the first line of the help message has been changed
      so that it no longer lists all supported targets. This eases the
      maintenance as we don't need to update the list in 2 places
      anymore whenever a new target is added.
      
      Also add a reference to the user guide to get the list of
      supported options.
      
      Change-Id: I79d8b815b0ffc0c43b4c05124378fce0e938365c
      1b578596
  16. 06 Mar, 2015 2 commits
    • Sandrine Bailleux's avatar
      Enable type-checking of arguments passed to printf() et al. · dad25049
      Sandrine Bailleux authored
      This patch modifies the declarations of the functions printf() et al.
      and adds the right GCC attribute to request the compiler to check
      the type of the arguments passed to these functions against the given
      format string. This will ensure that the compiler outputs warning
      messages like the following whenever it detects an inconsistency:
      
       file.c:42: warning: format ‘%d’ expects type ‘int’, but argument 3 has type ‘long int’
      
      It also fixes the type mismatch inconsistencies that it revealed
      across the code base.
      
      NOTE: THIS PATCH MAY FORCE PLATFORM PORTS OR SP/SPDS THAT USE THE
      PRINTF FAMILY OF FUNCTIONS TO FIX ANY TYPE MISMATCH INCONSISTENCIES.
      
      Change-Id: If36bb54ec7d6dd2cb4791d89b02a24ac13fd2df6
      dad25049
    • danh-arm's avatar
      Merge pull request #260 from jcastillo-arm/jc/tbb_sha256 · b5b12347
      danh-arm authored
      TBB: use SHA256 to generate the certificate signatures
      b5b12347
  17. 05 Mar, 2015 1 commit
    • Juan Castillo's avatar
      TBB: use SHA256 to generate the certificate signatures · ea4ec3aa
      Juan Castillo authored
      This patch replaces SHA1 by SHA256 in the 'cert_create' tool, so
      certificate signatures are generated according to the NSA Suite B
      cryptographic algorithm requirements.
      
      Documentation updated accordingly.
      
      Change-Id: I7be79e6b2b62dac8dc78a4f4f5006e37686bccf6
      ea4ec3aa