1. 14 Feb, 2019 1 commit
  2. 12 Feb, 2019 1 commit
  3. 08 Feb, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Make setjmp.h prototypes comply with the C standard · e0566305
      Antonio Nino Diaz authored
      
      
      Instead of having a custom implementation of setjmp() and longjmp() it
      is better to follow the C standard.
      
      The comments in setjmp.h are no longer needed as there are no deviations
      from the expected one, so they have been removed.
      
      All SDEI code that relied on them has been fixed to use the new function
      prototypes and structs.
      
      Change-Id: I6cd2e21cb5a5bcf81ba12283f2e4c067bd5172ca
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      e0566305
  4. 06 Feb, 2019 1 commit
  5. 05 Feb, 2019 1 commit
  6. 31 Jan, 2019 3 commits
    • Stephen Wolfe's avatar
      spd: trusty: pass max affinity level to Trusty · 1ffaaec9
      Stephen Wolfe authored
      
      
      During System Suspend, the entire system loses its state. To allow Trusty
      to save/restore its context and allow its TAs to participate in the suspend
      process, it needs to look at the max affinity level being suspended. This
      patch passes the max affinity level to Trusty to enable to do so.
      
      Change-Id: If7838dae10c3f5a694baedb15ec56fbad41f2b36
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      1ffaaec9
    • Mihir Joshi's avatar
      spd: tlkd: remove unwanted assert on System Suspend entry · 278d599c
      Mihir Joshi authored
      
      
      c_rt_ctx is used to store current SP before the system goes
      into suspend. The assert for its value being zero is not
      really necessary as the value gets over-written eventually.
      
      This patch removes assert(tlk_ctx->c_rt_ctx == 0) from the
      System Suspend path, as a result.
      
      Change-Id: If41f15e74ebbbfd82958d8e179114899b2ffb0a7
      Signed-off-by: default avatarMihir Joshi <mihirj@nvidia.com>
      278d599c
    • Mihir Joshi's avatar
      tlkd: support new TLK SMCs · 7bc05f52
      Mihir Joshi authored
      This patch adds support to handle following TLK SMCs:
      {TLK_SS_REGISTER_HANDLER, TLK_REGISTER_NS_DRAM_RANGES, TLK_SET_ROOT_OF_TRUST}
      
      These SMCs need to be supported in ATF in order to forward them to
      TLK. Otherwise, these functionalities won't work.
      
      Brief:
      TLK_SS_REGISTER_HANDLER: This SMC is issued by TLK Linux Driver to
      set up secure storage buffers.
      
      TLK_REGISTER_NS_DRAM_RANGES: Cboot performs this SMC during boot to
      pass NS memory ranges to TLK.
      
      TLK_SET_ROOT_OF_TRUST: Cboot performs this SMC during boot to pass
      Verified Boot parameters to TLK.
      
      Change-Id: I18af35f6dd6f510dfc22c1d1d1d07f643c7b82bc
      Reviewed-on: https://git-master.nvidia.com/r/1643851
      
      Signed-off-by: default avatarMihir Joshi <mihirj@nvidia.com>
      7bc05f52
  7. 30 Jan, 2019 1 commit
  8. 24 Jan, 2019 1 commit
  9. 23 Jan, 2019 1 commit
    • Anthony Zhou's avatar
      spd: trusty : fix defects flagged by MISRA scan · 591054a3
      Anthony Zhou authored
      
      
      Main Fixes:
      
      Use int32_t replace int [Rule 4.6]
      
      Added explicit casts (e.g. 0U) to integers in order for them to be
        compatible with whatever operation they're used in [Rule 10.1]
      
      Force operands of an operator to the same type category [Rule 10.4]
      
      Fixed if statement conditional to be essentially boolean [Rule 14.4]
      
      Voided non c-library functions whose return types are not used
      [Rule 17.7]
      
      Change-Id: I98caa330c371757eb2dfb9438448cb99115ed907
      Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      591054a3
  10. 22 Jan, 2019 2 commits
  11. 15 Jan, 2019 3 commits
  12. 08 Jan, 2019 2 commits
  13. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  14. 11 Dec, 2018 17 commits
  15. 10 Dec, 2018 4 commits
    • Antonio Nino Diaz's avatar
      SPM: Remove SP memory mappings definitions · 09d413a1
      Antonio Nino Diaz authored
      
      
      This information is retrieved from the resource description now.
      
      Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094
      Co-authored-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d413a1
    • Antonio Nino Diaz's avatar
      SPM: Deprecate boot info struct · 08aa122b
      Antonio Nino Diaz authored
      
      
      This information is defined by the Secure Partition in the resource
      description.
      
      Change-Id: Ia7db90c5de8360a596106880d3f6a632a88d3ea8
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      08aa122b
    • Antonio Nino Diaz's avatar
      SPM: Deprecate the current implementation · 2d7b9e5e
      Antonio Nino Diaz authored
      
      
      The current SPM is a prototype that only supports one secure partition
      in EL0. The objective of SPM is to have multiple partitions. The current
      MM interface isn't adequate for this, so it is needed to modify heavily
      the code to add proper support for it.
      
      However, there are platforms which are already using this (like SGI) and
      removing the code would break it.  For this reason, the current SPM code
      has been duplicated in order to temporarily preserve compatibility. All
      new improvements/changes to SPM will be done in the non-deprecated copy,
      that may change without notice.
      
      The new build option SPM_DEPRECATED has been introduced to select the SPM
      implementation. It defaults to 1, that selects the deprecated SPM.
      
      Change-Id: Ic9f80b53b450e97b4d3f47e4ef4a138ee8d87443
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2d7b9e5e
    • Jeenu Viswambharan's avatar
      AArch64: Use SSBS for CVE_2018_3639 mitigation · 48e1d350
      Jeenu Viswambharan authored
      
      
      The Armv8.5 extensions introduces PSTATE.SSBS (Speculation Store Bypass
      Safe) bit to mitigate against Variant 4 vulnerabilities. Although an
      Armv8.5 feature, this can be implemented by CPUs implementing earlier
      version of the architecture.
      
      With this patch, when both PSTATE.SSBS is implemented and
      DYNAMIC_WORKAROUND_CVE_2018_3639 is active, querying for
      SMCCC_ARCH_WORKAROUND_2 via. SMCCC_ARCH_FEATURES call would return 1 to
      indicate that mitigation on the PE is either permanently enabled or not
      required.
      
      When SSBS is implemented, SCTLR_EL3.DSSBS is initialized to 0 at reset
      of every BL stage. This means that EL3 always executes with mitigation
      applied.
      
      For Cortex A76, if the PE implements SSBS, the existing mitigation (by
      using a different vector table, and tweaking CPU ACTLR2) is not used.
      
      Change-Id: Ib0386c5714184144d4747951751c2fc6ba4242b6
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      48e1d350