- 16 Jul, 2021 1 commit
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Pali Rohár authored
INFO() macro for every call prepends "INFO: " string. Therefore current code prints unreadable debug messages: "INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO: " "INFO: Set IO decode window successfully, base(0xc000)INFO: win_attr(3d) max_dram_win(2) max_remap(0)INFO: win_offset(8)" Fix it by calling exactly one INFO() call for one line. After this change output is: "INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)" "INFO: Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)" Signed-off-by:Pali Rohár <pali@kernel.org> Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745
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- 02 Jun, 2021 1 commit
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Pali Rohár authored
The UART code for the A3K platform assumes that UART parent clock rate is always 25 MHz. This is incorrect, because the xtal clock can also run at 40 MHz (this is board specific). The frequency of the xtal clock is determined by a value on a strapping pin during SOC reset. The code to determine this frequency is already in A3K's comphy driver. Move the get_ref_clk() function from the comphy driver to a separate file and use it for UART parent clock rate determination. Signed-off-by:
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- 01 Jun, 2021 2 commits
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Pali Rohár authored
Macros PLAT_MARVELL_BOOT_UART* and PLAT_MARVELL_CRASH_UART* are defined to same values. De-duplicate them into PLAT_MARVELL_UART* macros. Signed-off-by: -
Pali Rohár authored
Macros PLAT_MARVELL_BL31_RUN_UART* are not used since commit d7c4420c ("plat/marvell: Migrate to multi-console API"). Remove them. Signed-off-by:
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- 28 May, 2021 1 commit
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Pali Rohár authored
UART parent clock is by default the platform's xtal clock, which is 25 MHz. The value defined in the driver, though, is 25.8048 MHz. This is a hack for the suboptimal divisor calculation Divisor = UART clock / (16 * baudrate) which does not use rounding division, resulting in a suboptimal value for divisor if the correct parent clock rate was used. Change the code for divisor calculation to Divisor = Round(UART clock / (16 * baudrate)) and change the parent clock rate value to 25 MHz. The final UART divisor for default baudrate 115200 is not affected by this change. (Note that the parent clock rate should not be defined via a macro, since the xtal clock can also be 40 MHz. This is outside of the scope of this fix, though.) Signed-off-by:
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- 27 Apr, 2021 1 commit
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Pali Rohár authored
This new compile option is only for Armada 3720 Development Board. When it is set to 1 then TF-A will setup PM wake up src configuration. By default this new option is disabled as it is board specific and no other A37xx board has PM wake up src configuration. Currently neither upstream U-Boot nor upstream Linux kernel has wakeup support for A37xx platforms, so having it disabled does not cause any issue. Prior this commit PM wake up src configuration specific for Armada 3720 Development Board was enabled for every A37xx board. After this change it is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1 Signed-off-by:
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- 29 Jan, 2021 9 commits
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Pali Rohár authored
It does not have to be supported by the current shell used in Makefile. Replace it by a simple echo with implicit newline. Signed-off-by: -
Pali Rohár authored
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Pali Rohár authored
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Pali Rohár authored
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Pali Rohár authored
This change separates building of flash and UART images, so it is possible to build only one of these images. Also this change allows make to build them in parallel. Target mrvl_flash now builds only flash image and mrvl_uart only UART image. This change reflects it also in the documentation. Signed-off-by: -
Pali Rohár authored
This removes need to move files and also allows to build uart and flash images in parallel. Signed-off-by: -
Pali Rohár authored
Currently a3700_common.mk makefile builds intermediate files in TF-A top level directory and also outside of the TF-A tree. This change fixes this issue and builds all intermediate files in $(BUILD_PLAT) directory. Part of this change is also removal of 'rm' and 'mv' commands as there is no need to remove or move intermediate files from outside of the TF-A build tree. Signed-off-by: -
Pali Rohár authored
When building WTMI image we need to correctly set DDR_TOPOLOGY and CLOCKSPRESET variables which WTMI build system expect. Otherwise it use default values. Signed-off-by: -
Pali Rohár authored
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory paths to pre-compiled Crypto++ library and header files. When both new parameters are specified then the source code of Crypto++ via CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build process to use system Crypto++ library. Signed-off-by:
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- 28 Jan, 2021 1 commit
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Pali Rohár authored
plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined These variables must contain a path to a valid directory (not a file) which really exists. Also WTP and MV_DDR_PATH must point to either a valid Marvell release tarball or git repository. Signed-off-by:
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- 11 Jan, 2021 1 commit
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Marek Behún authored
The current configuration of CPU windows on Armada 37x0 with 4 GB DRAM can only utilize 3.375 GB of memory. This is because there are only 5 configuration windows, configured as such (in hexadecimal, also showing ranges not configurable by CPU windows): 0 - 80000000 | 2 GB | DDR | CPU window 0 80000000 - C0000000 | 1 GB | DDR | CPU window 1 C0000000 - D0000000 | 256 MB | DDR | CPU window 2 D0000000 - D2000000 | 32 MB | | Internal regs empty space | | | D8000000 - D8010000 | 64 KB | | CCI regs empty space | | | E0000000 - E8000000 | 128 MB | DDR | CPU window 3 E8000000 - F0000000 | 128 MB | PCIe | CPU window 4 empty space | | | FFF00000 - end | 64 KB | | Boot ROM This can be improved by taking into account that: - CCI window can be moved (the base address is only hardcoded in TF-A; U-Boot and Linux will not break with changing of this address) - PCIe window can be moved (upstream U-Boot can change device-tree ranges of PCIe if PCIe window is moved) Change the layout after the Internal regs as such: D2000000 - F2000000 | 512 MB | DDR | CPU window 3 F2000000 - FA000000 | 128 MB | PCIe | CPU window 4 empty space | | | FE000000 - FE010000 | 64 KB | | CCI regs empty space | | | FFF00000 - end | 64 KB | | Boot ROM (Note that CCI regs base address is moved from D8000000 to FE000000 in all cases, not only for the configuration with 4 GB of DRAM. This is because TF-A is built with this address as a constant, so we cannot change this address at runtime only on some boards.) This yields 3.75 GB of usable RAM. Moreover U-Boot can theoretically reconfigure the PCIe window to DDR if it discovers that no PCIe card is connected. This can add another 128 MB of DRAM (resulting only in 128 MB of DRAM not being used). Signed-off-by:Marek Behún <marek.behun@nic.cz> Change-Id: I4ca1999f852f90055fac8b2c4f7e80275a13ad7e
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- 07 Jan, 2021 1 commit
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Pali Rohár authored
Only non-file targets should be set a .PHONY. Otherwise if file target is set as .PHONY then targets which depends on those file .PHONY targets would be always rebuilt even when their prerequisites are not changed. File target which needs to be always rebuilt can be specified in Make system via having a prerequisite on some .PHONY target, instead of marking whole target as .PHONY. In Makefile projects it is common to create empty .PHONY target named FORCE for this purpose. This patch changes all file targets which are set as .PHONY to depends on new .PHONY target FORCE, to ensure that these file targets are always rebuilt (as before). Basically they are those targets which calls external make subprocess. After FORCE target is specified in main Makefile, remove it from other Makefile files to prevent duplicate definitions. Signed-off-by:
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- 05 Jan, 2021 1 commit
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Marek Behún authored
Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which, when enabled, adds code to the PSCI reset handler to try to do system reset by the WTMI firmware running on the Cortex-M3 secure coprocessor. (This function is exposed via the mailbox interface.) The reason is that the Turris MOX board has a HW bug which causes reset to hang unpredictably. This issue can be solved by putting the board in a specific state before reset. Signed-off-by:
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- 07 Dec, 2020 8 commits
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Pali Rohár authored
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Pali Rohár authored
These two targets are build by make subprocesses and are independent. So splitting them into own targets allow make to build them in parallel. $(TIMBUILD) script depends on $(TIMDDRTOOL) so specify it in Makefile. Signed-off-by: -
Pali Rohár authored
FORCE target is used as a dependency for other file targets which needs to be always rebuilt. .PHONY target is standard Makefile target which specify non-file targets and therefore needs to be always rebuilt. Targets clean, realclean and distclean are .PHONY targets used to remove built files. Correctly set that mrvl_clean target is prerequisite for these clean targets to ensure that built files are removed. Finally this change with usage of FORCE target allows to remove mrvl_clean hack from the prerequisites of a8k ${DOIMAGETOOL} target which was used just to ensure that ${DOIMAGETOOL} is always rebuilt via make subprocess. Signed-off-by: -
Pali Rohár authored
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Pali Rohár authored
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Pali Rohár authored
Create copy of WTMI images instead of moving them into TF-A build directory. Signed-off-by: -
Pali Rohár authored
Rather create a temporary copy in $(BUILD_PLAT) and modify only copy. Signed-off-by: -
Pali Rohár authored
$(WTMI_IMG) is used only by $(MAKE) subprocess in $(DOIMAGEPATH) directory. So calling truncate on $(WTMI_IMG) after $(MAKE) in $(DOIMAGEPATH) has no effect and can just damage input file for future usage. Therefore remove this truncate call. Signed-off-by:
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- 19 Nov, 2020 2 commits
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Pali Rohár authored
This new target builds boot-image.bin binary as described in documentation. This image does not contain WTMI image and therefore WTP repository is not required for building. Having ability to build just this boot-image.bin binary without full flash-image.bin is useful for A3720 Turris MOX board which does not use Marvell's WTP and a3700_utils. To reduce duplicity between a8k and a3k code, define this new target and also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file marvell_common.mk. For this purpose it is needed to include plat/marvell/marvell.mk file from a3700_common.mk unconditionally (and not only when WTP is defined). Now when common file plat/marvell/marvell.mk does not contain definition for building $(DOIMAGETOOL), it is possible to move its inclusion at the top of the a3700_common.mk file. Signed-off-by: -
Pali Rohár authored
Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL) variable points to external pre-compiled Marvell x86_64 ELF linux binary from A3700-utils-marvell WTP repository. It means that currently it is not possible to compile TF-A for A3720 on other host platform then linux x86_64. Part of the A3700-utils-marvell WTP repository is also source code of $(DOIMAGETOOL) TBB_Linux tool. This change adds support for building $(DOIMAGETOOL) also for a3k platform. After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell WTP repository, compiled TBB_linux tool will appear in WTP subdirectory wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to point to the correct location where TBB_linux was built. To build TBB_linux it is required to compile external Crypto++ library which is available at: https://github.com/weidai11/cryptopp.git User needs to set CRYPTOPP_PATH option to specify path to that library. After this change it is now possible to build whole firmware for A3720 platform without requirement to use pre-compiled/proprietary x86_64 executable binaries from Marvell. Signed-off-by:
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- 21 Oct, 2020 1 commit
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Pali Rohár authored
Currently a3k target is misusing ${DOIMAGETOOL} target for building flash and UART images. It is not used for building image tool. So move ${DOIMAGETOOL} target from common marvell include file into a8k include file and add correct invocation of ${MAKE} into a3k for building flash and UART images. Part of this change is also checks that MV_DDR_PATH for a3k was specified by user as this option is required for building a3k flash and UART images. Signed-off-by:
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- 19 Oct, 2020 1 commit
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Pali Rohár authored
Include file plat/marvell/marvell.mk for platform A3700 was included two times. Once from file plat/marvell/armada/a3k/common/a3700_common.mk and second time from common file plat/marvell/armada/common/marvell_common.mk. It caused following warning every time was make called: plat/marvell/marvell.mk:51: warning: overriding recipe for target 'mrvl_clean' plat/marvell/marvell.mk:51: warning: ignoring old recipe for target 'mrvl_clean' Change in this commit removes inclusion of plat/marvell/marvell.mk file in common file plat/marvell/armada/common/marvell_common.mk. As a80x0 platform needs this include file, add it also into a80x0 platform specific include file lat/marvell/armada/a8k/common/a8k_common.mk. Also moves inclusion of plat/marvell/marvell.mk file in a3700 platform file plat/marvell/armada/a3k/common/a3700_common.mk at correct place. Global plat/marvell/marvell.mk expects that variables DOIMAGEPATH and DOIMAGETOOL are already defined, but it defines MARVELL_SECURE_BOOT variable which is needed by plat/marvell/armada/a3k/common/a3700_common.mk. Signed-off-by:
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- 15 Oct, 2020 1 commit
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Pali Rohár authored
plat: marvell: armada: a3k: When WTP is empty do not define variables and targets which depends on it Some of targets (e.g. mrvl_flash) depends on WTP build option. Other targets (e.g. fip) can be build also without WTP build option as they do not depend on it. This change put all A3720 variables and targets which depends on WTP into conditional if-endif section, so they are not defined when user has not supplied WTP build option. Target mrvl_flash is defined also when WTP was not specified and in this case it just print error message to help user. Variables which do not depend on WTP are moved to the top of a3700_common.mk file. Signed-off-by:
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- 04 Oct, 2020 2 commits
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Konstantin Porotchkin authored
Add *.bin extension to UART recovery images archive name. Such naming will cause the UART recovery images to be copied to the Buildroot output folder upon flash image build. Change-Id: I6992df1ab2ded725bed58e5baf245ae92c4cb289 Signed-off-by:Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Marvell uses RAM address 0x0 for loading BL33 stage images. When ATF is built with DEBUG=1, its IO subsystem fails on assert checking the destination RAM address != 0. This patch adds PLAT_ALLOW_ZERO_ADDR_COPY to A3K platform allowing to bypass the above check in debug mode. Change-Id: I687e35cb2e9dc3166bdaa81b3904c20b784c5c6a Signed-off-by:
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- 10 Jul, 2020 1 commit
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Konstantin Porotchkin authored
Area used as trusted DRAM is 12MB in Marvell OP-TEE OS module. It is followed by 4MB of shared memory. Change-Id: If8edeeec5861b529408baca25f78c06a0a440d8c Signed-off-by:
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- 19 Jun, 2020 3 commits
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Marcin Wojtas authored
It is not needed to reserve 64MB for FIP. Limit this to 4MB for both supported Armada SoC families. Change-Id: I58a8ce4408a646fe1afd3c1ea1ed54007c8d205d Signed-off-by:
Marcin Wojtas <mw@semihalf.com>
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Konstantin Porotchkin authored
- Remove TRUSTED_DRAM_BASE TRUSTED_DRAM_SIZE MARVELL_TRUSTED_SRAM_BASE - Rename PLAT_MARVELL_TRUSTED_DRAM_* -> PLAT_MARVELL_TRUSTED_RAM_* PLAT_MARVELL_TRUSTED_SRAM_* -> MARVELL_TRUSTED_DRAM_* MARVELL_MAP_SHARED_RAM -> MARVELL_MAP_SECURE_RAM - Move MARVELL_TRUSTED_DRAM_SIZE to marvell_def.h - Enable MARVELL_MAP_SECURE_RAM region in BL2U memory map - Add dependency of MARVELL_MAP_SHARED_RAM on LLC_SRAM - Add minor style improvents Change-Id: Iebc03361e4f88489af1597f54e137b27c241814c Signed-off-by: -
Konstantin Porotchkin authored
As a preparation to support proper loading the OPTEE OS image, enable the BL32 specific defines in case the SPD is used. On the occasion move two BL32-related macros to marvell_def.h and fix BL32_LIMIT definition. Change-Id: Id4e2d81833bc1895650cca8b0fc0bfc341cf77f3 Signed-off-by:
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- 18 Jun, 2020 1 commit
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Marcin Wojtas authored
The Marvell Armada 37xx SoCs-based platforms contain a bit awkward directory structure because the currently only one supported PLAT and PLAT_FAMILY are the same. Modify the latter to 'a3k' in order to improve it and keep plat/marvell/armada tree more consistent: plat/marvell/ ├── armada │ ├── a3k │ │ ├── a3700 [...] │ ├── a8k │ │ ├── a70x0 [...] Change-Id: I693a6ef88e6ce49a326a3328875c90bbc186066a Signed-off-by:
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