- 02 Jul, 2021 1 commit
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Tinghan Shen authored
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by read/write the subsys registers. However, the register region of subsys doesn't include in the MMU mapping region. It triggers MMU faults. This patch extends the MMU region 0 size to cover all mt8195 HW modules. This patch also remove MMU region 1 because region 0 covers region 1. Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638 Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
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- 31 May, 2021 1 commit
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Jiaxin Yu authored
Forbidden domain D4(DSP) access 0x40000000~0x1FFFF0000. Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Change-Id: If409df10cecbcccc493d7958ab2765fd110d9009
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- 27 May, 2021 2 commits
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Yann Gautier authored
Use the macros that are now defined in include/lib/smccc.h. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ie1dbc54569086f6a74206b873fee664b4cdeea36
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Hsin-Hsiung Wang authored
Update idle flow in case of last read command timeout. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: Idb0552d70d59b23822c38269d0fa9fe9ac0d6975
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- 26 May, 2021 3 commits
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Flora Fu authored
Add APU device apc driver and setup permission. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: I2bbdb69d11267e4252b2138b5c5ac8faf752740f
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Flora Fu authored
Add APU SiP call support for start/stop mcu. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: Ibf93d8ccf22c414de3093cee9e13f7668588f69e Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@mediatek.com>
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Rex-BC Chen authored
MTK display port mute/unmute control registers need to be set in secure world. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Iec73650e937bd20e25c18fa28d55ae29e68b10d3
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- 25 May, 2021 2 commits
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Flora Fu authored
Add APU iommap settings for reviser, apu_ao and devapc control wrapper. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: Ie8e6a197c0f440f9e4ee8101202283a2dbf501a6
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Flora Fu authored
Setup APU_S_S_4/APU_S_S_5 permission as SEC_RW_ONLY. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: I6c50b2913bf34270a1b0ffaf0e0c435fee192a4c
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- 23 Apr, 2021 14 commits
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Yidi Lin authored
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the driver with mt8195. Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
mt8195 also uses PMIC mt6359p. The only difference is the pwrap register definition. Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Add system_reset function in PSCI ops Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I177796e30198b0a53402093ee0917dda43074385
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mtk20895 authored
Add gpio driver. Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com> Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
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Yidi Lin authored
Add the basic SiP service Change-Id: I21fe9d85eac4be9101b12c4b6c28294c5b93cb5f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I1321f7989c8a3d116d698768a7146e8f180ee9c0
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James Liao authored
Add MCDI related drivers to handle CPU powered on/off in CPU suspend. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3fc206437de7ad8
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James Liao authored
Add SPMC driver for CPU power on/off. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: If47d7f3f3b9965f3c0402ea6cdb917ad1d16bb32
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Yidi Lin authored
Initialize delay_timer for delay functions. Change-Id: Ib554135151f8b5c642b5a6511c942bb9efc0a47f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Change-Id: I7e0fbd04b0cdf5da92b8ef39737342f2d66f5f10 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
The timer driver can be shared with mt8195. Move the the timer driver to common/. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I84c97ab9cc9b469f35e0f44dd8e7b2b95f1b3926
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gtk_pangao authored
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common common folder. Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com> Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
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christine.zhu authored
MT8192 GIC driver can be shared with MT8195. Move GIC driver to common and do the initialization. Signed-off-by: christine.zhu <christine.zhu@mediatek.corp-partner.google.com> Change-Id: I63f3e668b5ca6df8bcf17b5cd4d53fa84f330fed
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Yidi Lin authored
- Add basic platform setup - Add MT8195 documentation at docs/plat/ - Add generic CPU helper functions - Add basic register address Change-Id: I7978e2f32e58900e5cf93f741ee8eaf8b8e3b842 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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- 20 Apr, 2021 1 commit
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Nina Wu authored
Add devapc driver for setting default permission. Change-Id: I103f27ae090fbed76ce9319606ac082d78b74566 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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- 15 Apr, 2021 1 commit
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Yidi Lin authored
UART register definition is the same on MediaTek platforms. Move uart.h to common folder and remove the duplicate file. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: Iea0931dfd606ae4a7ab475b9cb3a08dc6de68b36
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- 08 Mar, 2021 1 commit
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Roger Lu authored
The case for value "VCOREFS_SMC_CMD_INIT" is not terminated by a "break" statement. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: I56cc7c1648e101c0da6e77e592e6edbd5d37724e
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- 03 Mar, 2021 5 commits
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Xi Chen authored
1 Only enable domain D0 and D1:PCIe access 0xC0000000~0xC4000000; 2 Only enable domain D0 and D3(SCP) access 0x50000000~0x51400000; Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: Ic4f9e6d85bfd1cebdb24ffc1d14309c89c103b2a
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Roger Lu authored
Change-Id: I4bd4612a7c7727a5be70957ae940e5f51c7ca5e6 Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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Roger Lu authored
Supports dram/mainpll/26m off when system suspend Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: Id13a06d4132f00fb60066de75920ecac18306e32
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Roger Lu authored
Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: I0ea7f61085ea9ba26c580107ef0cb9940a25f5e2
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Roger Lu authored
Low Power Management (LPM) helps find a suitable configuration for letting system entering idle or suspend with the most resources off. Change-Id: Ie6a7063b666cf338cff5bc972c9025b26de482eb Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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- 16 Dec, 2020 4 commits
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Yuchen Huang authored
add mt6359p rtc power off sequence and enable k_eosc mode Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Change-Id: I65450c63c44ccb5082541dbbe28b8aa0a95ecc56
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Yidi Lin authored
CID 364146: Control flow issues (DEADCODE) Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL are equal on mt8192, the following equation never hold. if (aff_lvl > PLAT_MAX_PWR_LVL) { return PSCI_E_INVALID_PARAMS; } Remove the deadcode to comply with MISRA standard. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398
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Yidi Lin authored
CID 364144: Integer handling issues (NO_EFFECT) The unsigned value is always greater-than-or-equal-to-zero. Remove such check. Change-Id: Ia395eb32f55a7098d2581ce7f548b7e1112beaa0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Xi Chen authored
1 Add Domain1(PCIe device) protect address: 0x80000000~0x83FF0000. 2 Add Domain2(SSPM/SPM/DPM/MCUPM) protect address: 0x40000000~0x1FFFF0000. Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: I4aaed37150076ae5943484c4adadac999a3d1762
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- 07 Dec, 2020 5 commits
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Nina Wu authored
1. Add mcusys related dcm drivers 2. Turn on mcusys-related dcm by default Change-Id: Ibbee37c87cc38e7a6cd7c93c2fc0817aad6dbe95 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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elly.chiang authored
enable PTP3 for protecting sysPi Signed-off-by: elly.chiang <elly.chiang@mediatek.com> Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
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Nina Wu authored
Add the basic SiP service Change-Id: Ib7f2380aab910adf8d33498a79ecd287273907c5 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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Yuchen Huang authored
When system resume, we want to print log as soon as possible. So we add uart save and restore api, and they will be called when systtem suspend and resume. Change-Id: I83b477fd2b39567c9c6b70534ef186993f7053ae Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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G.Pangao authored
1.Modify this driver to make it more complete and more standard. 2.And makes this driver available for more IC services. 3.Solve some bugs in the software. Signed-off-by: G.Pangao <gtk_pangao@mediatek.com> Change-Id: I284956d47ebbbd550ec93767679181185e442348
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