1. 06 Jun, 2020 1 commit
  2. 04 Dec, 2018 1 commit
    • Igal Liberman's avatar
      mvebu: cp110: avoid pcie power on/off sequence when called from Linux · 55df84f9
      Igal Liberman authored
      
      
      In Armada 8K DB boards, PCIe initialization can be executed only once
      because PCIe reset performed during chip power on and it cannot be
      executed via GPIO later.
      This means that power on can be executed only once, when it's called
      from the bootloader.
      Power on:
      	Read bit 21 of the mode, it marks if the caller is
      	the bootloader or the Linux Kernel.
      Power off:
      	Check if the comphy was already configured to PCIe, if yes,
      	check if the caller is bootloader, if both conditions are true
      	(PCIe mode and called by Linux) - skip the power-off.
      
      In addition, fix incorrect documentation describing mode fields -
      PCIe width is 3 bits, not 2.
      
      NOTE: with this patch, please use LK4.14.76 (LK4.4.120 may not work
      with it).
      
      Change-Id: I4b929011f97a0a1869a51ba378687e78b3eca4ff
      Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
      Reviewed-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
      Reviewed-by: default avatarKostya Porotchkin <kostap@marvell.com>
      55df84f9
  3. 18 Oct, 2018 1 commit
    • Grzegorz Jaszczyk's avatar
      mvebu: cp110: introduce COMPHY porting layer · 42a29337
      Grzegorz Jaszczyk authored
      
      
      Some of COMPHY parameters depends on the hw connection between the SoC
      and the PHY, which can vary on different boards e.g. due to different
      wires length. Define the "porting layer" with some defaults
      parameters. It ease updating static values which needs to be updated due
      to board differences, which are now grouped in one place.
      
      Example porting layer for a8k-db is under:
      plat/marvell/a8k/a80x0/board/phy-porting-layer.h
      
      If for some boards parameters are not defined (missing
      phy-porting-layer.h), the default values are used
      (drivers/marvell/comphy/phy-default-porting-layer.h)
      and the following compilation warning is show:
      "Using default comphy params - you may need to suit them to your board".
      
      The common COMPHY driver code is extracted in order to be shared with
      future COMPHY driver for A3700 SoC platforms
      Signed-off-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
      Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
      Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      42a29337
  4. 02 Sep, 2018 1 commit
  5. 18 Jul, 2018 1 commit