GitLab

Improve robustness and readability of exception code

PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops

Add CCN support to FVP

The documentation of the GNU assembler specifies the following about
the .align assembler directive:
 "the padding bytes are normally zero. However, on some systems, if
 the section is marked as containing code and the fill value is
 omitted, the space is filled with no-op instructions."
(see https://sourceware.org/binutils/docs/as/Align.html)

When building Trusted Firmware, the AArch64 GNU assembler uses a
mix of zero bytes and no-op instructions as the padding bytes to
align exception vectors.

This patch mandates to use zero bytes to be stored in the padding
bytes in the exception vectors. In the AArch64 instruction set, no
valid instruction encodes as zero so this effectively inserts
illegal instructions. Should this code end up being executed for
any reason, it would crash immediately. This gives us an extra
protection against misbehaving code at no extra cost.

Change-Id: I4f2abb39d0320ca0f9d467fc5af0cb92ae297351

This patch introduces some assembler macros to simplify the
declaration of the exception vectors. It abstracts the section
the exception code is put into as well as the alignments
constraints mandated by the ARMv8 architecture. For all TF images,
the exception code has been updated to make use of these macros.

This patch also updates some invalid comments in the exception
vector code.

Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95

This patch adds a new optional platform hook `pwr_domain_pwr_down_wfi()` in
the plat_psci_ops structure. This hook allows the platform to perform platform
specific actions including the wfi invocation to enter powerdown. This hook
is invoked by both psci_do_cpu_off() and psci_cpu_suspend_start() functions.
The porting-guide.md is also updated for the same.

This patch also modifies the `psci_power_down_wfi()` function to invoke
`plat_panic_handler` incase of panic instead of the busy while loop.

Fixes ARM-Software/tf-issues#375

Change-Id: Iba104469a1445ee8d59fb3a6fdd0a98e7f24dfa3

This patch adds support to select CCN driver for FVP during build.
A new build option `FVP_INTERCONNECT_DRIVER` is added to allow
selection between the CCI and CCN driver. Currently only the CCN-502
variant is supported on FVP.

The common ARM CCN platform helper file now verifies the cluster
count declared by platform is equal to the number of root node
masters exported by the ARM Standard platform.

Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a

This patch adds the API `ccn_get_part0_id` to query the PART0 ID from the
PERIPHERAL_ID 0 register in the CCN driver. This ID allows to distinguish
the variant of CCN present on the system and possibly enable dynamic
configuration of the IP based on the variant. Also added an assert in
`ccn_master_to_rn_id_map()` to ensure that the master map bitfield provided
by the platform is within the expected interface id.

Change-Id: I92d2db7bd93a9be8a7fbe72a522cbcba0aba2d0e

Implement generic delay timer and use it on platforms

Use the generic delay timer instead of having a specific platform
file for configuring it.

Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537

Use the generic delay timer instead of having a specific platform
file for configuring it.

Change-Id: If6b8f60bc04230f4b85b2bcc1b670fc65461214e

Added a build flag to select the generic delay timer on FVP instead
of the SP804 timer. By default, the generic one will be selected. The
user guide has been updated.

Change-Id: Ica34425c6d4ed95a187b529c612f6d3b26b78bc6

Add delay timer implementation based on the system generic counter.
This either uses the platform's implementation of
`plat_get_syscnt_freq()` or explicit clock multiplier/divider values
provided by the platform.

The current implementation of udelay has been modified to avoid
unnecessary calculations while waiting on the loop and to make it
easier to check for overflows.

Change-Id: I9062e1d506dc2f68367fd9289250b93444721732

Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all
upstream platforms.

Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe

Added plat_get_syscnt_freq2, which is a 32 bit variant of the 64 bit
plat_get_syscnt_freq. The old one has been flagged as deprecated.
Common code has been updated to use this new version. Porting guide
has been updated.

Change-Id: I9e913544926c418970972bfe7d81ee88b4da837e

Hw crypt v3

Change-Id: Idc40cc6243e532567ec4334ae37d97c003c90bfa
Signed-off-by: Yi Zheng <yi.zheng@mediatek.com>

Due to the changes in Mediatek platform common code, we need to move
plat related SiP functions to plat folder.

Change-Id: I6b14b988235205a5858b4bf49043bc79d0512b06
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>

Rockchip: Add some debug assertions in the PMU driver

This patch adds some debug assertions ensuring that array indices
are within the bounds of the array.

Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a

rockchip: support the suspend/resume for rk3399

Refactor MediaTek platform common code

This patch adds to support the suspend/resume for rk3399 SoCs.
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

FVP: Remove VE memory map support and change default GIC driver

Refactor MediaTek platform common code for further mt6795 upstream.

This patch changes the default driver for FVP platform from the deprecated
GICv3 legacy to the GICv3 only driver. This means that the default build of
Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The
user guide is also updated to reflect this change of default GIC driver for
FVP.

Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764

This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
same.

Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533

Emmc v3

In a lot of embedded platforms, eMMC device is the only one storage
device. So loading content from eMMC device is required in ATF.

Create the emmc stack that could co-work with IO block driver.
Support to read/write/erase eMMC blocks on both rpmb and normal
user area. Support to change the IO speed and bus width.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

Add MAX_IO_BLOCK_DEVICES in porting guide. It's necessary to define
this macro to support io block device. With this macro, multiple
block devices could be opened at the same time. Each block device
stores its own state.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

FIP is accessed as memory-mapped type. eMMC is block device type.
In order to support FIP based on eMMC, add the new io_block layer.

io_block always access eMMC device as block size. And it'll only
copy the required data into buffer in io_block driver. So preparing
an temporary buffer is required.

When use io_block device, MAX_IO_BLOCK_DEVICES should be declared
in platform_def.h. It's used to support multiple block devices.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

Doc: Fix the path to the xlat lib

fip_create: Fix exit status for missing output filename (2)

Fix computation of L1 bitmask in the translation table lib

The translation table library code has moved from lib/aarch64/ to
lib/xlat_tables/ since commit 3ca9928d but the Porting Guide still
points to the old location. This patch fixes this issue.

Change-Id: I983a9a100d70eacf6bac71725ffbb4bb5f3732b0

Change-Id: I0d298eea9eaf47121c87637c7395e5d9868aa272

This patch fixes the computation of the bitmask used to isolate
the level 1 field of a virtual address. The whole computation needs
to work on 64-bit values to produce the correct bitmask value.
XLAT_TABLE_ENTRIES_MASK being a C constant, it is a 32-bit value
so it needs to be extended to a 64-bit value before it takes part
in any other computation.

This patch fixes this bug by casting XLAT_TABLE_ENTRIES_MASK as
an unsigned long long.

Note that this bug doesn't manifest itself in practice because
address spaces larger than 39 bits are not yet supported in the
Trusted Firmware.

Change-Id: I955fd263ecb691ca94b29b9c9f576008ce1d87ee

Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is the fix for compilation error introduced by commit-id
`749ade45`, for platforms that use arm_common.c but do not
provide a memory mapped interface to the generic counter.

Fixes ARM-software/tf-issues#395

Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745

Validate psci_cpu_on_start() arguments