1. 24 Oct, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: clear the power mode status via M0 · 7ac52006
      Caesar Wang authored
      
      
      Due to the PMU design, the PMU may not clear the WAKEUP bit after
      wakeup, therefore, the state machine at the power mode may enter
      the infinite loop during WFI.
      
      There is a solution that we can use the M0 to monitor the WAKEUP
      bit and clear it during power mode, then the state machine will be
      recovered immediately. Then, the DUT can exit the WFI normally.
      
      Change-Id: I303628553b728c214bf2d436bd3122032b5e669c
      Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      7ac52006
  2. 21 Oct, 2016 1 commit
  3. 28 Sep, 2016 1 commit
  4. 25 Aug, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: rk3399: add dram driver · fe877779
      Caesar Wang authored
      add dram driver, and kernel can through sip function talk to bl31 to
      do ddr frequency scaling. and ddr auto powerdown.
      
      Change-Id: I0d0f2869aed95e336c6e23ba96a9310985c84840
      fe877779
  5. 11 Aug, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: update to handle PWMs for rk3399 · 5d3b1067
      Caesar Wang authored
      This patch updates some things for rk3399, as following:
      
      1) Add the new file to handle the pwm. (e.g. the pwm regulator)
      Make sure that good deal with the pwm related things.
      Also, remove some pwm setting for pmu.c.
      
      2) Set the plls slow mode and bypass in suspend, and restore them.
      
      Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
      5d3b1067
  6. 18 Jul, 2016 1 commit
    • Tony Xie's avatar
      rockchip: support the suspend/resume for rk3399 · 9ec78bdf
      Tony Xie authored
      1.Fixes the suspend/resume some bugs.
      2.Add the power domain for saving power consumption.
      3.Add cpu clusters suspend for rk3399 SoCs
      
      Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
      9ec78bdf
  7. 27 May, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: support rk3399 gpio driver · 9901dcf6
      Caesar Wang authored
      There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs
      on rk3399 platform.
      The pull direction(pullup or pulldown) for all of GPIOs are
      software-programmable.
      At the moment, we add the gpio basic driver since reset or power off
      the devices from gpio configuration for BL31.
      9901dcf6
  8. 04 May, 2016 1 commit
  9. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04