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  1. 20 Jan, 2021 1 commit
  3. 14 Aug, 2020 1 commit
  5. 16 Jul, 2020 1 commit
    • Etienne Carriere's avatar
      stm32mp1: SCMI clock and reset service in SP_MIN · fdaaaeb4
      Etienne Carriere authored 
      

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      fdaaaeb4
  7. 23 Jun, 2020 4 commits
    • Etienne Carriere's avatar
      stm32mp1: SP_MIN embeds Arm Architecture services · 450e15a7
      Etienne Carriere authored 
      

Embed Arch Architecture SMCCC services in stm32mp1 SP_MIN. This
service is needed by Linux kernel to setup the SMCCC conduit
used by its SCMI SMC transport driver.

Change-Id: I454a7ef3048a77ab73fff945e8115b60445d5841
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      450e15a7
    • Etienne Carriere's avatar
      stm32mp1: use last page of SYSRAM as SCMI shared memory · 0754143a
      Etienne Carriere authored 
      

SCMI shared memory is used to exchange message payloads between
secure SCMI services and non-secure SCMI agents. It is mapped
uncached (device) mainly to conform to existing support in
the Linux kernel. Note that executive messages are mostly short
(few 32bit words) hence not using cache will not penalize much
performances.

Platform stm32mp1 shall configure ETZPC to harden properly the
secure and non-secure areas of the SYSRAM address space, that before
CPU accesses the shared memory when mapped non-secure.

This change defines STM32MP_SEC_SYSRAM_BASE/STM32MP_SEC_SYSRAM_SIZE and
STM32MP_NS_SYSRAM_BASE/STM32MP_NS_SYSRAM_SIZE.

Change-Id: I71ff02a359b9668ae1c5a71b5f102cf3d310f289
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      0754143a
    • Etienne Carriere's avatar
      stm32mp1: shared resources: apply registered configuration · 5f038ac6
      Etienne Carriere authored 
      

BL32/SP_MIN configures platform security hardening from the shared
resources driver.  At the end of SP_MIN initialization, all shared
resources shall be assigned to secure or non-secure world by
drivers. A lock prevent from further change on the resource
assignation. By definition, resources not registered are assign
to non-secure world since not claimed by any component on the BL.

No functional change as all resources are currently in state
SHRES_UNREGISTERED hence assigned to non-secure world as prior
this change in stm32mp1_etzpc_early_setup() and
sp_min_platform_setup().

Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      5f038ac6
    • Etienne Carriere's avatar
      stm32mp1: introduce shared resources support · 47cf5d3f
      Etienne Carriere authored 
      

STM32MP1 SoC includes peripheral interfaces that can be assigned to
the secure world, or that can be opened to the non-secure world.

This change introduces the basics of a driver that manages such
resources which assignation is done at run time. It currently offers
API functions that state whether a service exposed to non-secure
world has permission to access a targeted clock or reset controller.

Change-Id: Iff20028f41586bc501085488c03546ffe31046d8
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      47cf5d3f
  9. 03 Jun, 2020 1 commit
  11. 25 Feb, 2020 1 commit
  13. 10 Sep, 2019 1 commit
  15. 02 Sep, 2019 3 commits
  17. 14 Feb, 2019 2 commits
  19. 18 Jan, 2019 5 commits
  21. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored 
      Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca339

 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  23. 15 Nov, 2018 1 commit
  25. 28 Sep, 2018 1 commit
  27. 24 Jul, 2018 1 commit