- 01 Nov, 2018 1 commit
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Antonio Nino Diaz authored
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented(). Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 29 Oct, 2018 2 commits
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Soby Mathew authored
This patch introduces Position Independant Executable(PIE) support in TF-A. As a initial prototype, only BL31 can support PIE. A trivial dynamic linker is implemented which supports fixing up Global Offset Table(GOT) and Dynamic relocations(.rela.dyn). The fixup_gdt_reloc() helper function implements this linker and this needs to be called early in the boot sequence prior to invoking C functions. The GOT is placed in the RO section of BL31 binary for improved security and the BL31 linker script is modified to export the appropriate symbols required for the dynamic linker. The C compiler always generates PC relative addresses to linker symbols and hence referencing symbols exporting constants are a problem when relocating the binary. Hence the reference to the `__PERCPU_TIMESTAMP_SIZE__` symbol in PMF is removed and is now calculated at runtime based on start and end addresses. Change-Id: I1228583ff92cf432963b7cef052e95d995cca93d Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch fixes up the AArch64 assembly code to use adrp/adr instructions instead of ldr instruction for reference to symbols. This allows these assembly sequences to be Position Independant. Note that the the reference to sizes have been replaced with calculation of size at runtime. This is because size is a constant value and does not depend on execution address and using PC relative instructions for loading them makes them relative to execution address. Also we cannot use `ldr` instruction to load size as it generates a dynamic relocation entry which must *not* be fixed up and it is difficult for a dynamic loader to differentiate which entries need to be skipped. Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 26 Oct, 2018 1 commit
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Roberto Vargas authored
This function is not related to Arm platforms and can be reused by other platforms if needed. Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 19 Oct, 2018 1 commit
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Soby Mathew authored
The `finish_console_register` macro is used by the multi console framework to register the `console_t` driver callbacks. It relied on weak references to the `ldr` instruction to populate 0 to the callback in case the driver has not defined the appropriate function. Use of `ldr` instruction to load absolute address to a reference makes the binary position dependant. These instructions should be replaced with adrp/adr instruction for position independant executable(PIE). But adrp/adr instructions don't work well with weak references as described in GNU ld bugzilla issue 22589. This patch defines a new version of `finish_console_register` macro which can spcify which driver callbacks are valid and deprecates the old one. If any of the argument is not specified, then the macro populates 0 for that callback. Hence the functionality of the previous deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define is used to select the new variant of the macro and will be removed once the deprecated variant is removed. All the upstream console drivers have been migrated to use the new macro in this patch. NOTE: Platforms be aware that the new variant of the `finish_console_register` should be used and the old variant is deprecated. Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 16 Oct, 2018 1 commit
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Jeenu Viswambharan authored
Pointer authentication is an Armv8.3 feature that introduces instructions that can be used to authenticate and verify pointers. Pointer authentication instructions are allowed to be accessed from all ELs but only when EL3 explicitly allows for it; otherwise, their usage will trap to EL3. Since EL3 doesn't have trap handling in place, this patch unconditionally disables all related traps to EL3 to avoid potential misconfiguration leading to an unhandled EL3 exception. Fixes ARM-software/tf-issues#629 Change-Id: I9bd2efe0dc714196f503713b721ffbf05672c14d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 15 Oct, 2018 1 commit
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Yann Gautier authored
To boot on eMMC or SD-cards, STM32MP1 platform needs: - GPT_IMAGE_ID to read GPT table on those devices - STM32_IMAGE_ID and IO_TYPE_STM32IMAGE to read images with STM32 header - IO_TYPE_MMC to have a IO for MMC devices Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 11 Oct, 2018 1 commit
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Sathees Balya authored
Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 10 Oct, 2018 1 commit
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John Tsichritzis authored
The definitions of the logging macros are reordered to be consistent with the definitions of the log levels. Change-Id: I6ff07b93eb64786ff147d39014d1c8e15db28444 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 09 Oct, 2018 1 commit
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Sathees Balya authored
Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 04 Oct, 2018 1 commit
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Antonio Nino Diaz authored
No functional changes. Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 3 commits
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Antonio Nino Diaz authored
Change-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Roberto Vargas authored
The code of LOAD_IMAGE_V2=0 has been removed. Change-Id: Iea03e5bebb90c66889bdb23f85c07d0c9717fffe Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Roberto Vargas authored
Change-Id: I40d040aa05bcbf11536a96ce59827711456b93a8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 21 Sep, 2018 1 commit
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Daniel Boulby authored
Allow AArch32 to use the multi console driver by adding the required functions Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 30 Aug, 2018 4 commits
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Antonio Nino Diaz authored
No functional changes. Change-Id: I850f08718abb69d5d58856b0e3de036266d8c2f4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8fbb4c785e7e07c7241e0c399a9b65161985c9df Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
When any of these functions is called the backtrace will be printed to the console. Change-Id: Id60842df824b320c485a9323ed6b80600f4ebe35 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Douglas Raillard authored
This function diplays the backtrace, the current EL and security state to allow a post-processing tool to choose the right binary to interpret the dump. The output can be fed to GNU addr2line to resolve function names given an ELF binary compiled with debug information. The "-i" flag is recommended to improve display in case of inlined functions. The *.dump files generated during the build process can also be used. The function works in AArch64 and AArch32. In AArch32 it only works in A32 mode (without T32 interworking), which is enforced in the Makefile. Sample output of a backtrace at EL3: BACKTRACE: START: function_name 0: EL3: 0x798 1: EL3: 0x538 2: EL3: 0x550 3: EL3: 0x55c 4: EL3: 0x568 5: EL3: 0x5a8 6: EL3: 0xf4 BACKTRACE: END: function_name In order to enable it the new option ENABLE_BACKTRACE must be set to 1. This option is set to 1 by default only in AArch64 debug builds. As usual, it can be overridden by the platform makefile and in the build command line. Change-Id: Icaff39b0e5188329728be2f3c72b868b2368e794 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 22 Aug, 2018 3 commits
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Antonio Nino Diaz authored
Change their names to printf and snprintf. They are much smaller than the previous versions we had, which makes them better suited for the Trusted Firmware. Change-Id: Ia872af91b7b967c47fce012eccecede7873a3daf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The C standard says that printf() has to return the number of characters it has printed. Change-Id: I0ef50b1d6766d140724ac0a2fa2c5d023431f984 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Aug, 2018 1 commit
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Jeenu Viswambharan authored
These changes address most of the required MISRA rules. In the process, some from generic code is also fixed. No functional changes. Change-Id: I707dbec9b34b802397e99da2f5ae738165d6feba Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 03 Aug, 2018 1 commit
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Roberto Vargas authored
Romlib is a new image that is stored in ROM and contains the code of several libraries that can be shared between different images. All the functions within in the library are accessed using a jump table which allows to update the romlib image whithout changing the binary compatibility. This jump table can be also stored in RAM and it can allow to patch a romlib with potential bugs fixes.. Change-Id: If980ccdaca24b7aaca900e32acc68baf6f94ab35 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 13 Jul, 2018 1 commit
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Sandrine Bailleux authored
Even if the log output is too low for a message to be printed out on the console by the debug macros, it should still be evaluated by the compiler to get some type checking and validation of the format specifiers. To do so, introduce the no_tf_log() macro that encloses the call to tf_log() in an always-false condition. This avoids the problem of discovering build issues only when we build the firmware with the right LOG_LEVEL value. Change-Id: Ic0fd252ab691d0187fd925756a4837aca1cbfd7b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 11 Jul, 2018 2 commits
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Roberto Vargas authored
Check_vector_size checks if the size of the vector fits in the size reserved for it. This check creates problems in the Clang assembler. A new macro, end_vector_entry, is added and check_vector_size is deprecated. This new macro fills the current exception vector until the next exception vector. If the size of the current vector is bigger than 32 instructions then it gives an error. Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
These directives are only used when stabs debugging information is used, but we use ELF which uses DWARF debugging information. Clang assembler doesn't support these directives, and removing them makes the code more compatible with clang. Change-Id: I2803f22ebd24c0fe248e04ef1b17de9cec5f89c4 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 27 Jun, 2018 1 commit
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Jeenu Viswambharan authored
At present, the function provided by the translation library to enable MMU constructs appropriate values for translation library, and programs them to the right registers. The construction of initial values, however, is only required once as both the primary and secondaries program the same values. Additionally, the MMU-enabling function is written in C, which means there's an active stack at the time of enabling MMU. On some systems, like Arm DynamIQ, having active stack while enabling MMU during warm boot might lead to coherency problems. This patch addresses both the above problems by: - Splitting the MMU-enabling function into two: one that sets up values to be programmed into the registers, and another one that takes the pre-computed values and writes to the appropriate registers. With this, the primary effectively calls both functions to have the MMU enabled, but secondaries only need to call the latter. - Rewriting the function that enables MMU in assembly so that it doesn't use stack. This patch fixes a bunch of MISRA issues on the way. Change-Id: I0faca97263a970ffe765f0e731a1417e43fbfc45 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 26 Jun, 2018 1 commit
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Antonio Nino Diaz authored
The meaning of them wasn't clear in the header file, it was needed to search the code for the places where they are used. Add parentheses to macros in the same header. Change-Id: I700bc0fd75ccfc0a34f439cb3b2692861bb73b9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Jun, 2018 1 commit
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Daniel Boulby authored
Conflict with function name and variable name within that function. Change the name of the function from image_size to get_image_size to remove conflict and make the function fit the normal project naming convention. Rule 5.3: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope Fixed For: make LOG_LEVEL=50 PLAT=fvp Change-Id: I1a63d2730113e2741fffa79730459c584b0224d7 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 22 May, 2018 1 commit
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Qixiang Xu authored
File: include/common/aarch64/el3_common_macros.S Change-Id: I619401e961a3f627ad8864781b5f90bc747c3ddb Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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- 18 May, 2018 1 commit
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Soby Mathew authored
This patch allows platforms to dynamically disable authentication of images during cold boot. This capability is controlled via the DYN_DISABLE_AUTH build flag and is only meant for development purposes. Change-Id: Ia3df8f898824319bb76d5cc855b5ad6c3d227260 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 04 May, 2018 1 commit
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Jeenu Viswambharan authored
RAS extensions are mandatory for ARMv8.2 CPUs, but are also optional extensions to base ARMv8.0 architecture. This patch adds build system support to enable RAS features in ARM Trusted Firmware. A boolean build option RAS_EXTENSION is introduced for this. With RAS_EXTENSION, an Exception Synchronization Barrier (ESB) is inserted at all EL3 vector entry and exit. ESBs will synchronize pending external aborts before entering EL3, and therefore will contain and attribute errors to lower EL execution. Any errors thus synchronized are detected via. DISR_EL1 register. When RAS_EXTENSION is set to 1, HANDLE_EL3_EA_FIRST must also be set to 1. Change-Id: I38a19d84014d4d8af688bd81d61ba582c039383a Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 23 Apr, 2018 1 commit
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Antonio Nino Diaz authored
Due to differences in the bitfields of the SMC IDs, it is not possible to support SMCCC 1.X and 2.0 at the same time. The behaviour of `SMCCC_MAJOR_VERSION` has changed. Now, it is a build option that specifies the major version of the SMCCC that the Trusted Firmware supports. The only two allowed values are 1 and 2, and it defaults to 1. The value of `SMCCC_MINOR_VERSION` is derived from it. Note: Support for SMCCC v2.0 is an experimental feature to enable prototyping of secure partition specifications. Support for this convention is disabled by default and could be removed without notice. Change-Id: I88abf9ccf08e9c66a13ce55c890edea54d9f16a7 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 17 Apr, 2018 1 commit
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Antonio Nino Diaz authored
Change-Id: I989c1f4aef8e3cb20d5d19e6347575e6449bb60b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 13 Apr, 2018 1 commit
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers Fixed for: make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \ GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all Change-Id: Ia34fe1ae1f142e89c9a6c19831e3daf4d28f5831 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 07 Apr, 2018 2 commits
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Jiafei Pan authored
For the adr instruction, it require the label's offset from the address of this instruction must be in the range +/-1MB. If the option "BL2_IN_XIP_MEM" is set to '1', in some cases, BL2's RW memory will not in the range of +/-1MB from BL2's RO memory region. so we need to use ldr instruction to cover this case. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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Jiafei Pan authored
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory, like BL1. In these use-cases, it is necessary to initialize the RW sections in RAM, while leaving the RO sections in place. This patch enable this use-case with a new build option, BL2_IN_XIP_MEM. For now, this option is only supported when BL2_AT_EL3 is 1. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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- 27 Mar, 2018 1 commit
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Joel Hutton authored
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type. Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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- 21 Mar, 2018 1 commit
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Antonio Nino Diaz authored
When the source code says 'SMCC' it is talking about the SMC Calling Convention. The correct acronym is SMCCC. This affects a few definitions and file names. Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S) but the old files have been kept for compatibility, they include the new ones with an ERROR_DEPRECATED guard. Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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