- 21 Jun, 2018 5 commits
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Sumit Garg authored
synquacer uses GICv3 compliant GIC500. So enable proper GICv3 driver initialization. Signed-off-by:Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
synquacer has CCN-512 interconnect. So enable proper CCN driver initialization. Signed-off-by: -
Sumit Garg authored
As this platform supports direct entry to BL31 and no BL2, so populate BL32 and BL33 entrypoints with static memory load info. Signed-off-by: -
Sumit Garg authored
Signed-off-by:
Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by:
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Sumit Garg authored
synquacer supports direct entry to BL31 without BL1 and BL2 as SCP firmware does similar work. So this patch adds BL31 stub APIs. Signed-off-by:
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