- 19 Jul, 2018 5 commits
- 18 Jul, 2018 19 commits
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Konstantin Porotchkin authored
Add support for BLx stages to use libraries in MAKE_BL macro. This change does not affect BL stages that do not have BL_LIBS variable defined in their makefiles. However in case that BL wants to use external library (for instance vendor-specific DDR initialization code supplied as a library), this patch will allow to build BL image linked with such library. Change-Id: Ife29069a72dc4aff833db6ef8b828736d6689b78 Signed-off-by:Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Remove assert on buffer address equal zero. Marvell uses address 0x0 for loading BL33, so this check is irrelevant and breaks the debug builds on Marvell platforms. Change-Id: Ie56a51138e2e4ddd8986dd7036797dc2d8b10125 Signed-off-by:
Haim Boot <hayim@marvell.com> Signed-off-by:
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Konstantin Porotchkin authored
Add support for A8K platform boards Change-Id: Ife025d930d2ab6cabbc13bbe19b2273cc1c938c8 Signed-off-by:
Hanna Hawa <hannah@marvell.com> Signed-off-by:
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Konstantin Porotchkin authored
Add common Marvell ARMADA platform components. This patch also includes common components for Marvell ARMADA 8K platforms. Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf Signed-off-by:
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Konstantin Porotchkin authored
Change-Id: I341440701b7e5e3555e604dd9d0a356795e6c4fb Signed-off-by:
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Konstantin Porotchkin authored
Add Marvell "doimage" utility support. The "doimage" utility allows to create flash images compatible with Marvell BootROM image format. Additionally this tool allows the flash image parsing and verification. Change-Id: Ie8d7ccd0cc2978684e7eecb695f375395fc749ee Signed-off-by: -
Konstantin Porotchkin authored
Add i2c driver for A8K SoC family. Change-Id: I5932b2fce286d84fc3ad5a74c4c456001faa3196 Signed-off-by:
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Konstantin Porotchkin authored
Add COMPHY driver for usage in a runtime service. Change-Id: I6fb42d0a099496d5699ee24684ae2b93ed35770b Signed-off-by:
Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by:
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Konstantin Porotchkin authored
Add thermal driver for A8K SoC family. The termal unit data is used by Marvell DRAM initialization code for optimizing the memory controller configuration Change-Id: Iad92689fa6e4224a89d872e9aa015393abd9cf73 Signed-off-by:
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Konstantin Porotchkin authored
Add LLC (L3) cache management drivers for Marvell SoCs AP806, AP807 and AP810 Change-Id: Ic70710f9bc5b6b48395d62212df7011e2fbb5894 Signed-off-by:
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Konstantin Porotchkin authored
Add definition of EL1 L2 Auxilary Control register to Cortex A72 library headers. Signed-off-by: -
Konstantin Porotchkin authored
Add ModularChip and MCI drivers for A8K SoC family. ModularChip drivers include support for the internal building blocks of Marvell ARMADA SoCs - APN806, APN807 and CP110 Change-Id: I9559343788fa2e5eb47e6384a4a7d47408787c02 Signed-off-by:
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Konstantin Porotchkin authored
Add address decoding unit drivers for Marvell SoCs. Address decoding flow and address translation units chart are located at docs/marvell/misc/mvebu-a8k-addr-map.txt Change-Id: Id6ce311fa1f4f112df3adfac5d20449f495f71ed Signed-off-by:
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Konstantin Porotchkin authored
Signed-off-by: -
Soby Mathew authored
Add i.MX8QX/i.MX8QM power management feature
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Sandrine Bailleux authored
Change-Id: I98f23f6cebcf984b57efc5449b75ff702e1984a0 Signed-off-by:Sandrine Bailleux <sandrine.bailleux@arm.com>
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Antonio Nino Diaz authored
Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by:Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ifea46da46d1bfd01b341acfad75df5bcab48a204 Signed-off-by: -
Soby Mathew authored
Always compile debug macros
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- 16 Jul, 2018 10 commits
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Antonio Nino Diaz authored
The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap. This change also increases the size of the Secure DRAM region. Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424 Signed-off-by: -
Antonio Nino Diaz authored
In the memory map of the documentation the kernel only had 16MiB of allocated space. This leaves very little room for growth, so the addresses of the DTB and the kernel have been interchanged. The documentation has been updated to reflect this change. Change-Id: Ib6eab69f047fa88561fb755397ce3a0b356c8860 Signed-off-by: -
Antonio Nino Diaz authored
Add information about direct Linux kernel boot for kernels that support PSCI. Change-Id: I05f76aa36398edabf411cb25a646437af1862e6e Signed-off-by: -
Antonio Nino Diaz authored
This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as U-Boot. Change-Id: I2b22e8933fad6a614588ace559f893e97329801f Signed-off-by: -
Antonio Nino Diaz authored
FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly. Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-by: -
Antonio Nino Diaz authored
Remove unused variable and set the secure entrypoint correctly. Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: -
Antonio Nino Diaz authored
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them). It is disabled by default. Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60 Signed-off-by: -
Antonio Nino Diaz authored
Note that this is a non-secure RNG. This is only useful for educational purposes. Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: -
Antonio Nino Diaz authored
There is no way to boot BL31 at the addresses specified in the platform memory map unless an extra loader is used at address 0x00000000. It is better to remove it to prevent confusion. Having it enabled was a bug. Change-Id: I3229fbc080f5996cff47efce8e799bae94e0d5cb Signed-off-by: -
Soby Mathew authored
rpi3: A few improvements
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- 15 Jul, 2018 3 commits
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Antonio Nino Diaz authored
This library can be used in other projects. All comments that talk about the Trusted Firmware should be talking about the library itself. Change-Id: I3b98d42f7132be72c1f8a4900acfaa78dbd2daa2 Signed-off-by: -
Antonio Nino Diaz authored
Instead of having a different initialization routine than the rest of the codebase, use the common implementation. Change-Id: I27c03b9905f3cf0af8810aad9e43092005387a1a Signed-off-by: -
Antonio Nino Diaz authored
This allows other parts of the code to reuse it. No functional changes. Change-Id: Ib052ae235c422d9179958bd3016c3e678779ae9b Signed-off-by:
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- 14 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Implement VideoCore mailbox interface driver and use it to get the board revision identifier. For now it is only used to print the model for debug purposes. This wiki contains the documentation of the mailbox interface: https://github.com/raspberrypi/firmware/wiki Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c Signed-off-by:
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Antonio Nino Diaz authored
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode. Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3 Signed-off-by:
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- 13 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually. Documentation updated to reflect the changes. Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by:
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