- 07 Dec, 2020 23 commits
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Yuchen Huang authored
When system resume, we want to print log as soon as possible. So we add uart save and restore api, and they will be called when systtem suspend and resume. Change-Id: I83b477fd2b39567c9c6b70534ef186993f7053ae Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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G.Pangao authored
1.Modify this driver to make it more complete and more standard. 2.And makes this driver available for more IC services. 3.Solve some bugs in the software. Signed-off-by: G.Pangao <gtk_pangao@mediatek.com> Change-Id: I284956d47ebbbd550ec93767679181185e442348
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Hsin-Hsiung Wang authored
add power-off support Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: If19e99971515a8ae1ac9ae21046e4382adc18a69
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Hsin-Hsiung Wang authored
add pmic mt6359p driver Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: I20f2218f7d2087e8d2bf31258cf92a02e0dab77d
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Nina Wu authored
Init delay_timer for the use of delay functions Change-Id: I35aefd7515bb9259634c8b6bc37d8c74da96e8f1 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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Dehui Sun authored
Enable NS access for all systimers. Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> Change-Id: I3693997082a1d6f09fef5a79b6cf5a91be46cb8a
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Change-Id: I31abfc752b69ac40e70bc9e7a55163eb39776c44 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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James Liao authored
Add MCDI related drivers to handle CPU powered on/off in CPU suspend. Change-Id: I5110461e8eef86f8383b45f197ec5cb10dbfeb3e Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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James Liao authored
Add SPMC driver for CPU power on/off. Change-Id: I526b98d5885855efce019dd09cfd93b8816cbf19 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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Madhukar Pappireddy authored
* changes: plat: xilinx: zynqmp: Enable log messages for debug plat: zynqmp: Change macro name of PM_BOOT_HEALTH_STATUS_REG
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Manish Pandey authored
* changes: plat: marvell: armada: a3k: Simplify check if WTP variable is defined plat: marvell: armada: a3k: Split building $(WTMI_MULTI_IMG) and $(TIMDDRTOOL) plat: marvell: armada: Maximal size of bl1 image in mrvl_bootimage is 128kB plat: marvell: armada: Add missing FORCE, .PHONY and clean targets plat: marvell: armada: a3k: Use make ifeq/endif syntax for $(MARVELL_SECURE_BOOT) code plat: marvell: armada: a3k: Build $(WTMI_ENC_IMG) in $(BUILD_PLAT) directory plat: marvell: armada: a3k: Do not remove external WTMI image files outside of TF-A repository plat: marvell: armada: a3k: Do not modify $(WTMI_MULTI_IMG) plat: marvell: armada: a3k: Do not modify $(WTMI_IMG)
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ieb352f0765882efdcb64ef54e6b2a39768590a06
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Pali Rohár authored
These two targets are build by make subprocesses and are independent. So splitting them into own targets allow make to build them in parallel. $(TIMBUILD) script depends on $(TIMDDRTOOL) so specify it in Makefile. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I139fc7fe64d8de275b01a853e15bfb88c4ff840d
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Pali Rohár authored
Add check when building mrvl_bootimage that size of bl1 image is not bigger than maximal size. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ib873debd3cfdba9acd4c168ee37edab3032e9f25
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Pali Rohár authored
FORCE target is used as a dependency for other file targets which needs to be always rebuilt. .PHONY target is standard Makefile target which specify non-file targets and therefore needs to be always rebuilt. Targets clean, realclean and distclean are .PHONY targets used to remove built files. Correctly set that mrvl_clean target is prerequisite for these clean targets to ensure that built files are removed. Finally this change with usage of FORCE target allows to remove mrvl_clean hack from the prerequisites of a8k ${DOIMAGETOOL} target which was used just to ensure that ${DOIMAGETOOL} is always rebuilt via make subprocess. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2fa8971244b43f101d846fc433ef7b0b6f139c92
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Id766db4a900a56c795fe5ffdd8a2b80b1aaa2132
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Iaecd6c24bf334a959ac2bf395c3ee49c810b01a7
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Pali Rohár authored
Create copy of WTMI images instead of moving them into TF-A build directory. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2dc24c33b9ce540e4acde51fc1a5c946ae66a5d7
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Pali Rohár authored
Rather create a temporary copy in $(BUILD_PLAT) and modify only copy. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I256c029106ea6f69faa086fc4e5bee9f68cd257f
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Pali Rohár authored
$(WTMI_IMG) is used only by $(MAKE) subprocess in $(DOIMAGEPATH) directory. So calling truncate on $(WTMI_IMG) after $(MAKE) in $(DOIMAGEPATH) has no effect and can just damage input file for future usage. Therefore remove this truncate call. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I9925c54c5d3d10eadc19825c5565ad4598a739a7
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Venkatesh Yadav Abbarapu authored
Save some space by enabling the log messages like bl33 address only for debug builds. Also check the bl33 and bl32 address and print only if this is not NULL. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I58d846bf69a75e839eb49abcbb9920af13296886
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Tejas Patel authored
For boot health status PMU Global General Storage Register 4 is used. GGS4 can be used for other purpose along with boot health status. So, change its name from PM_BOOT_HEALTH_STATUS_REG to PMU_GLOBAL_GEN_STORAGE4. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I2f5c4c6a161121e7cdb4b9f0f8711d0dad16c372
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Madhukar Pappireddy authored
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- 05 Dec, 2020 1 commit
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Madhukar Pappireddy authored
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- 04 Dec, 2020 1 commit
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Venkatesh Yadav Abbarapu authored
Update the xilinx platform makefile to include GICv2 makefile instead of adding the individual files. Updating this change as per the latest changes done in the commit #1322dc94 . Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I79d8374c47a7f42761d121522b32ac7a5021ede8
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- 03 Dec, 2020 6 commits
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Madhukar Pappireddy authored
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Manish Pandey authored
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Madhukar Pappireddy authored
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Yann Gautier authored
Relax the 80 character line length, as done in checkpatch, since Linux 5.7. Change-Id: I093a2e6a45336339193173f7ff6a461279cf411d Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Manish Pandey authored
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Olivier Deprez authored
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- 02 Dec, 2020 3 commits
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Madhukar Pappireddy authored
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Alexei Fedorov authored
This patch provides the following changes: - Adds definition for FEAT_MTE3 value in ID_AA64PFR1_EL1 register - Enables Memory Tagging Extension for FEAT_MTE3. Change-Id: I735988575466fdc083892ec12c1aee89b5faa472 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Manish Pandey authored
Merge "Add myself and Venkatesh Yadav Abbarapu as code owners for Xilinx platforms" into integration
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- 01 Dec, 2020 3 commits
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Lauren Wehrmeister authored
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Masato Fukumori authored
Increase SHARED_RAM_SIZE in sbsa_qemu platform from 4KB to 8KB. sbsa_qemu uses SHARED_RAM for mail box and hold state of each cpus. If qemu is configured with 512 cpus, region size used by qemu is greater than 4KB. Signed-off-by: Masato Fukumori <masato.fukumori@linaro.org> Change-Id: I639e44e89335249d385cdc339350f509e9bd5e36
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Christoph Müllner authored
It uses the system timer as "entropy" source in the same way as QEMU, layerscape and others. Change-Id: Icda17b78e85255bea96109ca2ee0e091187d62ac Signed-off-by: Christoph Müllner <christophm30@gmail.com>
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- 30 Nov, 2020 3 commits
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Javier Almansa Sobrino authored
Enable basic support for Neoverse-N2 CPUs. Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8ad
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Alexei Fedorov authored
This patch provides the changes listed below: - Adds new bit fields definitions for SCTLR_EL1/2 registers - Corrects the name of SCTLR_EL1/2.[20] bit field from SCTLR_UWXN_BIT to SCTLR_TSCXT_BIT - Adds FEAT_PANx bit field definitions and their possible values for ID_AA64MMFR1_EL1 register. - Adds setting of SCTLR_EL1.SPAN bit to preserve PSTATE.PAN on taking an exception to EL1 in spm_sp_setup() function (services\std_svc\spm_mm\spm_mm_setup.c) Change-Id: If51f20e7995c649126a7728a4d0867041fdade19 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Manish Pandey authored
* changes: zynqmp: pm: update error codes to match Linux and PMU Firmware zynqmp: pm: Filter errors related to clock gate permissions
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