1. 28 Jan, 2020 1 commit
    • Madhukar Pappireddy's avatar
      Enable -Wredundant-decls warning check · ca661a00
      Madhukar Pappireddy authored
      
      
      This flag warns if anything is declared more than once in the same
      scope, even in cases where multiple declaration is valid and changes
      nothing.
      
      Consequently, this patch also fixes the issues reported by this
      flag. Consider the following two lines of code from two different source
      files(bl_common.h and bl31_plat_setup.c):
      
      IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
      IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE);
      
      The IMPORT_SYM macro which actually imports a linker symbol as a C expression.
      The macro defines the __RO_START__ as an extern variable twice, one for each
      instance. __RO_START__ symbol is defined by the linker script to mark the start
      of the Read-Only area of the memory map.
      
      Essentially, the platform code redefines the linker symbol with a different
      (relevant) name rather than using the standard symbol. A simple solution to
      fix this issue in the platform code for redundant declarations warning is
      to remove the second IMPORT_SYM and replace it with following assignment
      
      static const unsigned long BL2_RO_BASE = BL_CODE_BASE;
      
      Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      ca661a00
  2. 23 Jan, 2020 1 commit
  3. 18 Dec, 2019 1 commit
    • Varun Wadekar's avatar
      Tegra: prepare boot parameters for Trusty · 2783205d
      Varun Wadekar authored
      This patch saves the boot parameters provided by the previous bootloader
      during cold boot and passes them to Trusty. Commit 06ff251e
      
       introduced
      the plat_trusty_set_boot_args() handler, but did not consider the boot
      parameters passed by the previous bootloader. This patch fixes that
      anomaly.
      
      Change-Id: Ib40dcd02b67c94cea5cefce09edb0be4a998db37
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      2783205d
  4. 17 Dec, 2019 1 commit
  5. 28 Nov, 2019 1 commit
    • Varun Wadekar's avatar
      Tegra: introduce plat_enable_console() · 117dbe6c
      Varun Wadekar authored
      
      
      This patch introduces the 'plat_enable_console' handler to allow
      the platform to enable the right console. Tegra194 platform supports
      multiple console, while all the previous platforms support only one
      console.
      
      For Tegra194 platforms, the previous bootloader checks the platform
      config and sets the uart-id boot parameter, to 0xFE. On seeing this
      boot parameter, the platform port uses the proper memory aperture
      base address to communicate with the SPE. This functionality is
      currently protected by a platform macro, ENABLE_CONSOLE_SPE.
      
      Change-Id: I3972aa376d66bd10d868495f561dc08fe32fcb10
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      117dbe6c
  6. 24 Oct, 2019 1 commit
  7. 05 Sep, 2019 1 commit
  8. 15 Aug, 2019 1 commit
  9. 20 Jun, 2019 2 commits
  10. 03 Apr, 2019 1 commit
  11. 01 Mar, 2019 1 commit
    • Varun Wadekar's avatar
      Tegra: dummy support for the io_storage backend · 8d56e24b
      Varun Wadekar authored
      
      
      This patch provides dummy macros and platform files to compile
      the io_storage driver backend. This patch is necessary to
      remove the "--unresolved=el3_panic" linker flag from Tegra's
      makefiles and allow us to revert this workaround, previously
      suggested by the ARM toolchain team.
      
      The "--unresolved=el3_panic" flag actually was a big hammer that
      allowed Tegra platforms to work with armlink previously but it
      masks legit errors with the code as well.
      
      Change-Id: I0421d35657823215229f84231896b84167f90548
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      8d56e24b
  12. 05 Feb, 2019 3 commits
  13. 31 Jan, 2019 14 commits
  14. 23 Jan, 2019 11 commits
    • Varun Wadekar's avatar
      Tegra: memctrl_v2: remove usage of ENABLE_SMMU_DEVICE config · fc5adf7d
      Varun Wadekar authored
      
      
      This patch removes the usage of this platform config, as it is always
      enabled by all the supported platforms.
      
      Change-Id: Ie7adb641adeb3604b177b6960b797722d60addfa
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      fc5adf7d
    • Dilan Lee's avatar
      Tegra: add 'late' platform setup handler · 3e1923d9
      Dilan Lee authored
      
      
      This patch adds a platform setup handler that gets called after
      the MMU is enabled. Platforms wanting to make use of this handler
      should declare 'plat_late_platform_setup' handler in their platform
      files, to override the default weakly defined handler.
      
      Change-Id: Ibc97a2e5a24608ddea856d0bd543a9d5876f604c
      Signed-off-by: default avatarDilan Lee <dilee@nvidia.com>
      3e1923d9
    • Varun Wadekar's avatar
      Tegra: spe: shared console for Tegra platforms · dd20f5b3
      Varun Wadekar authored
      
      
      There are Tegra platforms which have limited UART ports and so
      all the components have to share the console. The SPE helps out
      by collecting all the logs in such cases and prints them on the
      shared UART port.
      
      This patch adds a driver to communicate with the SPE driver, which
      in turn provides the console.
      
      Change-Id: Ie750520b936b8bed0ab1d876f03fc0a3490a85a3
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      dd20f5b3
    • Varun Wadekar's avatar
      Tegra: console driver compilation from platform makefiles · 4cba6985
      Varun Wadekar authored
      
      
      This patch includes the console driver from individual platform
      makefiles and removes it from tegra_common.mk. This allows future
      platforms to include consoles of their choice.
      
      Change-Id: I7506562bfac78421a80fb6782ac8472fbef6cfb0
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      4cba6985
    • Varun Wadekar's avatar
      Tegra: smmu: change exit criteria for context size calculation · 2ad1bddc
      Varun Wadekar authored
      
      
      Tegra SoCs currently do not have a SMMU register at address 0xFFFFFFFF.
      This patch changes the search criteria, to look for this marker, to
      calculate the size of the saved context.
      
      Change-Id: I15d91945ecb78267f91c45f37985dbb2327ca3ae
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      2ad1bddc
    • Steven Kao's avatar
      Tegra: memctrl_v2: platform handler for TZDRAM setup · c63ec263
      Steven Kao authored
      
      
      The Tegra memctrl driver sets up the TZDRAM fence during boot and
      system suspend exit. This patch provides individual platforms with
      handlers to perform custom steps during TZDRAM setup.
      
      Change-Id: Iee094d6ca189c6dd24f1147003c33c99ff3a953b
      Signed-off-by: default avatarSteven Kao <skao@nvidia.com>
      c63ec263
    • Varun Wadekar's avatar
      Tegra: bpmp: return error if BPMP init fails · d7be5e2e
      Varun Wadekar authored
      
      
      This patch returns error if BPMP initialization fails. The platform
      code marks the cluster as "runnning" since we wont be able to get
      it into the low power state without BPMP.
      
      Change-Id: I86f51d478626240bb7b4ccede8907674290c5dc1
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      d7be5e2e
    • Steven Kao's avatar
      Tegra: rename secure scratch register macros · 601a8e54
      Steven Kao authored
      
      
      This patch renames all the secure scratch registers to reflect their
      usage.
      
      This is a list of all the macros being renamed:
      
      - SECURE_SCRATCH_RSV1_* -> SCRATCH_RESET_VECTOR_*
      - SECURE_SCRATCH_RSV6 -> SCRATCH_SECURE_BOOTP_FCFG
      - SECURE_SCRATCH_RSV11_* -> SCRATCH_SMMU_TABLE_ADDR_*
      - SECURE_SCRATCH_RSV53_* -> SCRATCH_BOOT_PARAMS_ADDR_*
      - SECURE_SCRATCH_RSV55_* -> SCRATCH_TZDRAM_ADDR_*
      
      NOTE: Future SoCs will have to define these macros to
            keep the drivers functioning.
      
      Change-Id: Ib3ba40dd32e77b92b47825f19c420e6fdfa8b987
      Signed-off-by: default avatarSteven Kao <skao@nvidia.com>
      601a8e54
    • Varun Wadekar's avatar
      Tegra: memctrl_v2: platform handler for TZDRAM settings · d5bd0de6
      Varun Wadekar authored
      
      
      The Tegra memctrl driver sets up the TZDRAM fence during boot and
      system suspend exit. This patch provides individual platforms with
      handlers to perform platform specific steps, e.g. enable encryption,
      save base/size to secure scratch registers.
      
      Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      d5bd0de6
    • Varun Wadekar's avatar
      Tegra: bpmp_ipc: IPC driver to communicate with BPMP firmware · 26e2b93a
      Varun Wadekar authored
      
      
      This patch adds the driver to communicate with the BPMP firmware on Tegra
      SoCs, starting Tegra186. BPMP firmware is responsible for clock enable/
      disable requests, module resets among other things.
      
      MRQ is short for Message ReQuest. This is the general purpose, multi channel
      messaging protocol that is widely used to communicate with BPMP. This is further
      divided into a common high level protocol and a peer-specific low level protocol.
      The higher level protocol specifies the peer identification, channel definition
      and allocation, message structure, message semantics and message dispatch process
      whereas the lower level protocol defines actual message transfer implementation
      details. Currently, BPMP supports two lower level protocols - Token Mail Operations
      (TMO), IVC Mail Operations (IMO).
      
      This driver implements the IMO protocol. IMO is implemented using the IVC (Inter-VM
      Communication) protocol which is a lockless, shared memory messaging queue management
      protocol.
      
      The IVC peer is expected to perform the following as part of establishing a connection
      with BPMP.
      
      1. Initialize the channels with tegra_ivc_init() or its equivalent.
      2. Reset the channel with tegra_ivc_channel_reset. The peer should also ensure that
         BPMP is notified via the doorbell.
      3. Poll until the channel connection is established [tegra_ivc_channel_notified() return
         0]. Interrupt BPMP with doorbell each time after tegra_ivc_channel_notified() return
         non zero.
      
      The IPC driver currently supports reseting the GPCDMAand XUSB_PADCTL hardware blocks. In
      future, more hardware blocks would be supported.
      
      Change-Id: I52a4bd3a853de6c4fa410904b6614ff1c63df364
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      26e2b93a
    • Varun Wadekar's avatar
      Tegra: call 'early_init' handler earlier during boot · 01da3bd2
      Varun Wadekar authored
      
      
      This patch calls the 'early_init' handler earlier during boot. This
      allows the platforms using Tegra186 onwards to init the BPMP interface
      earlier.
      
      Change-Id: I0d540df39de7864ce9051ebe11eca5432c462ebf
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      01da3bd2