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Neoverse V1 erratum 1940577 is a Cat B erratum, present in some
revisions of the V1 processor core.  The workaround is to insert a
DMB ST before acquire atomic instructions without release semantics.
This issue is present in revisions r0p0 - r1p1  but this workaround
only applies to revisions r1p0 - r1p1, there is no workaround for older
versions.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I210ad7d8f31c81b6ac51b028dfbce75a725c11aa

* changes:
  refactor(plat/nxp/lx216x): refine variable definition
  refactor(plat/nxp/lx216x): use common make variables

* changes:
  docs: add mt6795 to deprecated list
  feat(plat/mediatek/mt8195): add DCM driver

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I2b3aa9bd0c23c360ecee673c68e1b2c92bc6d2be

Neoverse V1 erratum 1791573 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic6f92da4d0b995bd04ca5b1673ffeedaebb71d10

INFO() macro for every call prepends "INFO:   " string. Therefore
current code prints unreadable debug messages:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO:    "
    "INFO:    Set IO decode window successfully, base(0xc000)INFO:     win_attr(3d) max_dram_win(2) max_remap(0)INFO:     win_offset(8)"

Fix it by calling exactly one INFO() call for one line. After this
change output is:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)"
    "INFO:    Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)"
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745

Change-Id: I65da6ead356e3f4ee47c5a6bf391f65309bafcdd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

The two existing plat/rockchip code owners seem to be no longer active
in the project and are not responding to reviews. There have been a
couple of small fixup patches[1][2][3] pending for months that couldn't
be checked in for lack of Code-Owner-Review+1 flag. Add myself to the
code owner list to unblock this bottleneck (I have been deeply involved
in the rk3399 port, at least, so I know most of the code reasonably
well).

[1] https://review.trustedfirmware.org/9616
[2] https://review.trustedfirmware.org/9990
[2] https://review.trustedfirmware.org/10415

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ic7b2bb73c35a9bea91ff46ee445a22819d2045d9

Change-Id: Ia660b6554fe4544effd1810e1aca202f95e3c447
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

* changes:
  fix(plat/xilinx/versal): use sync method for blocking calls
  fix(plat/xilinx/zynqmp): use sync method for blocking calls

All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I6f568b85d0da639c264f507122e3015807d8423d

All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I78f9c061a80cee6d524ade4ef124ca88ce1848cf

* changes:
  refactor(measured boot): revisit error handling (3/3)
  refactor(measured boot): revisit error handling (2/3)
  refactor(measured boot): revisit error handling (1/3)

* changes:
  refactor(plat/st): add stm32image_io_setup
  fix(plat/st): panic if boot interface is wrong

DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.

Change-Id: I3237199bc217bd3682f51d31284db5fd0324b396
Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>

* changes:
  fix(tools/stm32image): improve the tool
  fix(plat/st): add STM32IMAGE_SRC

 - In tpm_record_measurement():

   The platform layer is responsible for providing an exhaustive list
   of images to measure. If it doesn't then this should be treated as
   a programming error, as documented in [1].

   Thus, turn the error test into an assertion.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guidelines.html#using-assert-to-check-for-programming-errors



Change-Id: I002309c2ebdf2d348a7d12a8f7f9e82465046b8e
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

- In add_event2():

  Turn the first error condition checking whether there is room for an
  extra event2 data structure into an assertion. The platform layer is
  responsible for choosing an appropriate event log buffer size based
  on the number of measurements it expects. If this assertion fires,
  the platform macro EVENT_LOG_SIZE should be adjusted and the
  firmware recompiled.

  Call this assumption out in the function documentation.

  Also remove the second error condition check, which is a subset of
  the first one and thus is redundant.

  As a result of these changes, add_event2() can no longer fail. Thus,
  change its return type from int to void.

  Also, the 'size_of_event' local variable is now unused in release
  builds so remove it and move its value into the assertion.

Change-Id: I113fc141de59708b20435a0c7126255561ab7786
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

 - In event_log_init():

   Throughout the function, we are incrementing a pointer by some fixed
   amounts of bytes (corresponding to the size of some data structure or
   to some constant number of bytes), there is no variable-size
   increments in the picture. Thus it seems pointless to verify that the
   pointer has indeed been incremented by this fixed amount of bytes
   afterwards.

   For this reason, remove these checks altogether. As a result, the
   start_ptr local variable is now unused so remove it as well.

Change-Id: I612e2278cd3a63d1417427e45d81e285503f5efe
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

In the qemu memory map 1GB and up is RAM. Change the
size of NS DRAM to 3GB to support VM's with more
memory requirements.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Change-Id: If15cf3b9d3e2e7876c40ce888f22e887893fe696

Change-Id: I5b84a28ed254a7c7bb95c18fa999592a4e3f6d90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

* changes:
  refactor(plat/fvp): tidy up list of images to measure
  docs: explain Measured Boot dependency on Trusted Boot

* changes:
  feat(plat/mediatek/mt8195): add SPM suspend driver
  feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
  feat(plat/mediatek/mt8195): add support for PTP3
  fix(plat/mediatek/mt8195): extend MMU region size

Support DRAM/MAINPLL/26M off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ib8502f9b0b4e47aa405e5449f0b6d483bd3f5d77

Add drivers to support MCUSYS off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: I388fd2318f471083158992464ecdf2181fc7d87a

Add PTP3 drivers to protect CPU excessive voltage drop
in CPU heavy loading.

Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d
Signed-off-by: Elly Chiang <elly.chiang@mediatek.com>

In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.

This patch extends the MMU region 0 size to cover all mt8195 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.

Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>

The partition layout description JSON file generated by TF-A tests
declares a fourth test partition called Ivy demonstrating the
implementation of a S-EL0 partition supported by a S-EL1 shim.

Change-Id: If8562acfc045d6496dfdb3df0524b3a069357f8e
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>

* changes:
  fix(plat/st): correct IO compensation disabling
  fix(plat/st): correct BSEC error code management
  fix(drivers/st/pmic): missing error check
  fix(drivers/st/pmic): initialize i2c_state
  fix(drivers/st/clk): use correct return value