- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Jul, 2017 1 commit
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Leo Yan authored
After disconnect Jumper pin 1-2 in J15 header, the signal VBUS_DET is to be pulled down to low level. This will assert the interrupt signal in PMIC and trigger IRQ in GIC; the asserted signal from VBUS_DET is level triggered and kernel reports the warning for unhooked interrupt handling; and VBUS_DET stays with low level, this triggers IRQ storm in kernel. This patch is to disable interrupt for VBUS_DET in PMIC, this can dismiss the verbose log and IRQ storm after kernel booting. [ 40.835279] irq 57: nobody cared (try booting with the "irqpoll" option) [ 40.842075] CPU: 0 PID: 980 Comm: irq/57-hi655x-p Not tainted 4.4.77-568944-g576a0114dec8-dirty #667 [ 40.851303] Hardware name: HiKey Development Board (DT) [ 40.856580] Call trace: [ 40.859060] [<ffffff800808c4cc>] dump_backtrace+0x0/0x1e0 [ 40.864516] [<ffffff800808c8ac>] show_stack+0x20/0x28 [ 40.869622] [<ffffff80084b9688>] dump_stack+0xa8/0xe0 [ 40.874729] [<ffffff800812dd5c>] __report_bad_irq+0x40/0xec [ 40.880360] [<ffffff800812e0bc>] note_interrupt+0x1e4/0x2d8 [ 40.885992] [<ffffff800812b11c>] handle_irq_event_percpu+0xd8/0x268 [ 40.892324] [<ffffff800812b2f8>] handle_irq_event+0x4c/0x7c [ 40.897955] [<ffffff800812ecbc>] handle_level_irq+0xcc/0x178 [ 40.903672] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c [ 40.909481] [<ffffff80085074c8>] pl061_irq_handler+0xa8/0x124 [ 40.915286] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c [ 40.921092] [<ffffff800812a820>] __handle_domain_irq+0x90/0xf8 [ 40.926985] [<ffffff8008082620>] gic_handle_irq+0x58/0xa8 Signed-off-by: Dmitry Shmidt <dimitrysh@google.com> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 24 May, 2017 1 commit
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Haojian Zhuang authored
Initialize regulators, pins and eMMC in BL1. Only SRAM could be used in BL1. So BL2 will be loaded from eMMC into SRAM later. Change-Id: I8e7ef82ffa29a3c647c9d2d2981e8759ee85d833 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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