- 03 Jun, 2016 5 commits
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danh-arm authored
Fix a syntax error in plat/arm/common/aarch64/arm_common.c
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danh-arm authored
Add support for ARM Cortex-A73 MPCore Processor
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danh-arm authored
Build option to include AArch32 registers in cpu context
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Sandrine Bailleux authored
Building TF with ERROR_DEPRECATED=1 fails because of a missing semi-column. This patch fixes this syntax error. Change-Id: I98515840ce74245b0a0215805f85c8e399094f68
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Soby Mathew authored
The system registers that are saved and restored in CPU context include AArch32 systems registers like SPSR_ABT, SPSR_UND, SPSR_IRQ, SPSR_FIQ, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2. Accessing these registers on an AArch64-only (i.e. on hardware that does not implement AArch32, or at least not at EL1 and higher ELs) platform leads to an exception. This patch introduces the build option `CTX_INCLUDE_AARCH32_REGS` to specify whether to include these AArch32 systems registers in the cpu context or not. By default this build option is set to 1 to ensure compatibility. AArch64-only platforms must set it to 0. A runtime check is added in BL1 and BL31 cold boot path to verify this. Fixes ARM-software/tf-issues#386 Change-Id: I720cdbd7ed7f7d8516635a2ec80d025f478b95ee
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- 01 Jun, 2016 1 commit
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Yatharth Kochar authored
This patch adds ARM Cortex-A73 MPCore Processor support in the CPU specific operations framework. It also includes this support for the Base FVP port. Change-Id: I0e26b594f2ec1d28eb815db9810c682e3885716d
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- 27 May, 2016 9 commits
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danh-arm authored
rockchip/rk3399: Support the gpio driver and configure
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danh-arm authored
Improve robustness and readability of exception code
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danh-arm authored
PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops
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danh-arm authored
Add CCN support to FVP
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Caesar Wang authored
if define power off gpio, BL31 will do system power off through gpio control.
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Caesar Wang authored
If define a reset gpio, BL31 will use gpio to reset SOC, otherwise use CRU reset.
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Caesar Wang authored
We add plat parameter structs to support BL2 to pass variable-length, variable-type parameters to BL31. The parameters are structured as a link list. During bl31 setup time, we travse the list to process each parameter. throuth this way, we can get the reset or power off gpio parameter, and do hardware control in BL31. This structure also can pass other parameter to BL31 in future.
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Caesar Wang authored
There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs on rk3399 platform. The pull direction(pullup or pulldown) for all of GPIOs are software-programmable. At the moment, we add the gpio basic driver since reset or power off the devices from gpio configuration for BL31.
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Caesar Wang authored
On some platform gpio can set/get pull status when input, add these function so we can set/get gpio pull status when need it. And they are optional function.
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- 26 May, 2016 2 commits
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Sandrine Bailleux authored
The documentation of the GNU assembler specifies the following about the .align assembler directive: "the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions." (see https://sourceware.org/binutils/docs/as/Align.html) When building Trusted Firmware, the AArch64 GNU assembler uses a mix of zero bytes and no-op instructions as the padding bytes to align exception vectors. This patch mandates to use zero bytes to be stored in the padding bytes in the exception vectors. In the AArch64 instruction set, no valid instruction encodes as zero so this effectively inserts illegal instructions. Should this code end up being executed for any reason, it would crash immediately. This gives us an extra protection against misbehaving code at no extra cost. Change-Id: I4f2abb39d0320ca0f9d467fc5af0cb92ae297351
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Sandrine Bailleux authored
This patch introduces some assembler macros to simplify the declaration of the exception vectors. It abstracts the section the exception code is put into as well as the alignments constraints mandated by the ARMv8 architecture. For all TF images, the exception code has been updated to make use of these macros. This patch also updates some invalid comments in the exception vector code. Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95
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- 25 May, 2016 3 commits
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Soby Mathew authored
This patch adds a new optional platform hook `pwr_domain_pwr_down_wfi()` in the plat_psci_ops structure. This hook allows the platform to perform platform specific actions including the wfi invocation to enter powerdown. This hook is invoked by both psci_do_cpu_off() and psci_cpu_suspend_start() functions. The porting-guide.md is also updated for the same. This patch also modifies the `psci_power_down_wfi()` function to invoke `plat_panic_handler` incase of panic instead of the busy while loop. Fixes ARM-Software/tf-issues#375 Change-Id: Iba104469a1445ee8d59fb3a6fdd0a98e7f24dfa3
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Soby Mathew authored
This patch adds support to select CCN driver for FVP during build. A new build option `FVP_INTERCONNECT_DRIVER` is added to allow selection between the CCI and CCN driver. Currently only the CCN-502 variant is supported on FVP. The common ARM CCN platform helper file now verifies the cluster count declared by platform is equal to the number of root node masters exported by the ARM Standard platform. Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a
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Soby Mathew authored
This patch adds the API `ccn_get_part0_id` to query the PART0 ID from the PERIPHERAL_ID 0 register in the CCN driver. This ID allows to distinguish the variant of CCN present on the system and possibly enable dynamic configuration of the IP based on the variant. Also added an assert in `ccn_master_to_rn_id_map()` to ensure that the master map bitfield provided by the platform is within the expected interface id. Change-Id: I92d2db7bd93a9be8a7fbe72a522cbcba0aba2d0e
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- 24 May, 2016 1 commit
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danh-arm authored
Implement generic delay timer and use it on platforms
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- 20 May, 2016 6 commits
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Antonio Nino Diaz authored
Use the generic delay timer instead of having a specific platform file for configuring it. Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537
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Antonio Nino Diaz authored
Use the generic delay timer instead of having a specific platform file for configuring it. Change-Id: If6b8f60bc04230f4b85b2bcc1b670fc65461214e
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Antonio Nino Diaz authored
Added a build flag to select the generic delay timer on FVP instead of the SP804 timer. By default, the generic one will be selected. The user guide has been updated. Change-Id: Ica34425c6d4ed95a187b529c612f6d3b26b78bc6
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Antonio Nino Diaz authored
Add delay timer implementation based on the system generic counter. This either uses the platform's implementation of `plat_get_syscnt_freq()` or explicit clock multiplier/divider values provided by the platform. The current implementation of udelay has been modified to avoid unnecessary calculations while waiting on the loop and to make it easier to check for overflows. Change-Id: I9062e1d506dc2f68367fd9289250b93444721732
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Antonio Nino Diaz authored
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms. Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
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Antonio Nino Diaz authored
Added plat_get_syscnt_freq2, which is a 32 bit variant of the 64 bit plat_get_syscnt_freq. The old one has been flagged as deprecated. Common code has been updated to use this new version. Porting guide has been updated. Change-Id: I9e913544926c418970972bfe7d81ee88b4da837e
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- 12 May, 2016 3 commits
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danh-arm authored
Hw crypt v3
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Yi Zheng authored
Change-Id: Idc40cc6243e532567ec4334ae37d97c003c90bfa Signed-off-by: Yi Zheng <yi.zheng@mediatek.com>
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Jimmy Huang authored
Due to the changes in Mediatek platform common code, we need to move plat related SiP functions to plat folder. Change-Id: I6b14b988235205a5858b4bf49043bc79d0512b06 Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
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- 11 May, 2016 1 commit
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danh-arm authored
Rockchip: Add some debug assertions in the PMU driver
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- 05 May, 2016 1 commit
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Sandrine Bailleux authored
This patch adds some debug assertions ensuring that array indices are within the bounds of the array. Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a
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- 04 May, 2016 5 commits
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danh-arm authored
rockchip: support the suspend/resume for rk3399
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danh-arm authored
Refactor MediaTek platform common code
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Caesar Wang authored
This patch adds to support the suspend/resume for rk3399 SoCs. Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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danh-arm authored
FVP: Remove VE memory map support and change default GIC driver
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Leon Chen authored
Refactor MediaTek platform common code for further mt6795 upstream.
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- 28 Apr, 2016 1 commit
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Soby Mathew authored
This patch changes the default driver for FVP platform from the deprecated GICv3 legacy to the GICv3 only driver. This means that the default build of Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The user guide is also updated to reflect this change of default GIC driver for FVP. Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764
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- 27 Apr, 2016 2 commits
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Soby Mathew authored
This patch removes support for legacy Versatile Express memory map for the GIC peripheral in the FVP platform. The user guide is also updated for the same. Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533
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danh-arm authored
Emmc v3
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