- 22 Nov, 2018 4 commits
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Antonio Nino Diaz authored
This reverts commit 6f512a3d . According to the 'Cortex-A57 MPCore Software Developers Errata Notice': This bug will only affect secure AArch64 EL3. If the above conditions occur, the CPU will not invalidate the targeted EL3 TLB entries and incorrect translations might occur. For this reason it is not needed in AArch32. Change-Id: I6f7b333817515499723e8f306145790ad6af9975 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
xlat v2: Support mapping regions with allocated VA
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Antonio Niño Díaz authored
rcar-gen3: lock RPC hyper-flash access
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Antonio Nino Diaz authored
Provide new APIs to add new regions without specifying the base VA. - `mmap_add_region_alloc_va` adds a static region to mmap choosing as base VA the first possible address after all the currently mapped regions. It is aligned to an appropriate boundary in relation to the size and base PA of the requested region. No attempt is made to fill any unused VA holes. - `mmap_add_dynamic_region_alloc_va` it adds a region the same way as `mmap_add_region_alloc_va` does, but it's dynamic instead of static. - `mmap_add_alloc_va` takes an array of non const `mmap_region_t`, maps them in the same way as `mmap_add_region_alloc_va` and fills their `base_va` field. A helper macro has been created to help create the array, called `MAP_REGION_ALLOC_VA`. Change-Id: I5ef3f82ca0dfd0013d2e8034aa22f13ca528ba37 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Nov, 2018 5 commits
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Antonio Niño Díaz authored
rpi3: fix bad formatting in rpi3.rst
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Pete Batard authored
d4fd0219 (pull request #1685) introduced unwanted formatting such as bold/italic in the description for RPI3_USE_UEFI_MAP.
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Antonio Niño Díaz authored
backtrace: Extract rules from root Makefile
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Antonio Niño Díaz authored
rpi3: add RPI3_USE_UEFI_MAP build option
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Jorge Ramirez-Ortiz authored
RCAR_RPC_HYPERFLASH_LOCKED can be set to 0 as a build option if the user needs to allow u-boot to reprogram the ATF firmware using a FIP image (as a faster alternative of toggling numerous DIP switches on the board and using ascii-xfer of srec files) The code being controlled with this commit should only be re-enabled for debugging (_never_ on a product release) Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
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- 19 Nov, 2018 4 commits
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Antonio Niño Díaz authored
hikey: increase delay after eMMC initialized
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Antonio Niño Díaz authored
Marvell: Migrate to multi console API
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Antonio Nino Diaz authored
It's better to have them in a separate file instead of having them spread across the Makefile. This is what the stack protector is already doing. Change-Id: Id30742c0af10de5ea6d10674ca25bf52b0f2b262 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Pete Batard authored
The default Raspberry Pi 3 memory mapping for ATF is geared towards the use of uboot + Linux. This creates issues when trying to use ATF with an UEFI payload and Windows on ARM64. We therefore introduce new build option RPI3_USE_UEFI_MAP, that enables the build process to use an alternate memory mapping that is compatible with UEFI + Windows (as well as UEFI + Linux). Fixes ARM-software/tf-issues#649 Signed-off-by: Pete Batard <pete@akeo.ie>
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- 16 Nov, 2018 1 commit
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Antonio Niño Díaz authored
Add multi console support for STM32MP1
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- 15 Nov, 2018 10 commits
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Antonio Niño Díaz authored
rpi3: add RPI3_RUNTIME_UART build option
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Ryan Grachek authored
Some eMMC chips require a longer delay. After testing different chips, 20ms appears to work reliably. Signed-off-by: Ryan Grachek <ryan@edited.us>
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Konstantin Porotchkin authored
Migrate Marvell platforms from legacy console API to multi-console API. Change-Id: I647f5f49148b463a257a747af05b5f0c967f267c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Yann Gautier authored
Now that MULTI_CONSOLE_API is enabled for the STM32MP1 platform, we can remove the non MULTI_CONSOLE_API parts in the driver. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
When compiling assembly files, stdint.h is not included. UINT32_C and UINT64_C are then not defined. A new GENMASK macro for assembly is then created. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Antonio Niño Díaz authored
SPM priority level changes
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Konstantin Porotchkin authored
According to "openssl" manual: -K key The actual key to use: this must be represented as a string comprised only of hex digits. If only the key is specified, the IV must additionally specified using the -iv option. When both a key and a password are specified, the key given with the -K option will be used and the IV generated from the password will be taken. It does not make much sense to specify both key and password. This patch removes "-k 0" parameter from the encryption command since we are already using "-K" and "-iv" for the key and IV. Change-Id: Ia333cedaa3207e643c95d2ec7c229f50eeab96db Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/60745 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Sharon Habet <sharonh@marvell.com>
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- 14 Nov, 2018 3 commits
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Sughosh Ganu authored
The current secure partition design mandates that a) at a point, only a single core can be executing in the secure partition, and b) a core cannot be preempted by an interrupt while executing in secure partition. Ensure this by activating the SPM priority prior to entering the parition. Deactivate the priority on return from the partition. Change-Id: Icb3473496d16b733564592eef06304a1028e4f5c Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Register a priority level, PLAT_SP_PRI, for secure partition with EL3 exception handling framework(ehf) module. The secure partition manager(SPM) would raise the core's priority to PLAT_SP_PRI before entering the secure partition, to protect the core from getting interrupted while in secure partition. Change-Id: I686897f052a4371e0efa9b929c07d3ad77249e95 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add a dependency for building EL3 exception handling framework(EHF) module with the secure partition manager(SPM). The EHF module is needed for raising the core's running priority before the core enters the secure partition, and lowering it subsequently on exit from the secure partition. Change-Id: Icbe2d0a63f00b46dc593ff3d86b676c9333506c3 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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- 13 Nov, 2018 3 commits
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Pete Batard authored
Some OSes (e.g. Ubuntu 18.04 LTS on Raspberry Pi 3) may disable the runtime UART in a manner that prevents the system from rebooting if ATF tries to send runtime messages there. Also, we don't want the firmware to share the UART with normal world, as this can be a DoS attack vector into the secure world. This patch fixes these 2 issues by introducing new build option RPI3_RUNTIME_UART, that disables the runtime UART by default. Fixes ARM-software/tf-issues#647 Signed-off-by: Pete Batard <pete@akeo.ie>
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Antonio Nino Diaz authored
Correct some issues found with static analysis tools
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Antonio Niño Díaz authored
cadence: uart: comply to console_register prototype
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- 12 Nov, 2018 3 commits
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Alexei Colin authored
Signed-off-by: Alexei Colin <acolin@isi.edu>
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Antonio Niño Díaz authored
hikey, hikey960, poplar: use new console APIs
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Antonio Niño Díaz authored
Add support new Xilinx Versal ACAP platform
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- 09 Nov, 2018 5 commits
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Yann Gautier authored
It is already in include/drivers/st/stm32mp1_ddr_helpers.h. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
These issues wer found by sparse: drivers/st/clk/stm32mp1_clk.c:1524:19: warning: incorrect type in assignment (different base types) expected restricted fdt32_t const [usertype] *pkcs_cell got unsigned int const [usertype] * plat/st/stm32mp1/plat_image_load.c:13:6: warning: symbol 'plat_flush_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:21:16: warning: symbol 'plat_get_bl_image_load_info' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:29:13: warning: symbol 'plat_get_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/bl2_io_storage.c:40:10: warning: symbol 'block_buffer' was not declared. Should it be static? Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
cppcheck: [drivers/partition/gpt.c:19] -> [drivers/partition/gpt.c:19]: (warning) Either the condition 'str_in!=((void*)0)' is redundant or there is possible null pointer dereference: name. sparse: drivers/partition/gpt.c:39:9: warning: Using plain integer as NULL pointer Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
These warnings were issued by sparse: plat/st/stm32mp1/stm32mp1_pm.c:365:36: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] pwr_domain_pwr_down_wfi )( ... ) got void ( [noreturn] *<noident> )( ... ) plat/st/stm32mp1/stm32mp1_pm.c:366:23: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] system_off )( ... ) got void ( [noreturn] *<noident> )( ... ) plat/st/stm32mp1/stm32mp1_pm.c:367:25: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] system_reset )( ... ) got void ( [noreturn] *<noident> )( ... ) This cannot be changed the other way in all platforms pm drivers or else there is a compilation error: plat/st/stm32mp1/stm32mp1_pm.c:234:1: error: attributes should be specified before the declarator in a function definition Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Siva Durga Prasad Paladugu authored
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC "versal_virt". Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- 08 Nov, 2018 2 commits
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Jerome Forissier authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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Jerome Forissier authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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