- 31 Oct, 2018 3 commits
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Antonio Niño Díaz authored
sdei: include "context.h" to fix compilation errors
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Antonio Niño Díaz authored
Allwinner/pmic v2
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Varun Wadekar authored
This patch includes context.h from sdei_private.h to fix the following compilation errors: <snip> In file included from services/std_svc/sdei/sdei_event.c:9:0: services/std_svc/sdei/sdei_private.h: In function 'sdei_client_el': services/std_svc/sdei/sdei_private.h:164:2: error: unknown type name 'cpu_context_t' cpu_context_t *ns_ctx = cm_get_context(NON_SECURE); ^ services/std_svc/sdei/sdei_private.h:165:2: error: unknown type name 'el3_state_t' el3_state_t *el3_ctx = get_el3state_ctx(ns_ctx); ^ services/std_svc/sdei/sdei_private.h:165:2: error: implicit declaration of function 'get_el3state_ctx' [-Werror=implicit-function-declaration] services/std_svc/sdei/sdei_private.h:165:25: error: initialization makes pointer from integer without a cast [-Werror] el3_state_t *el3_ctx = get_el3state_ctx(ns_ctx); ^ services/std_svc/sdei/sdei_private.h:167:2: error: implicit declaration of function 'read_ctx_reg' [-Werror=implicit-function-declaration] return ((read_ctx_reg(el3_ctx, CTX_SCR_EL3) & SCR_HCE_BIT) != 0U) ? ^ services/std_svc/sdei/sdei_private.h:167:33: error: 'CTX_SCR_EL3' undeclared (first use in this function) return ((read_ctx_reg(el3_ctx, CTX_SCR_EL3) & SCR_HCE_BIT) != 0U) ? ^ services/std_svc/sdei/sdei_private.h:167:33: note: each undeclared identifier is reported only once for each function it appears in cc1: all warnings being treated as errors <snip> Change-Id: Id0cad56accf81b19cb0d301784f3f086dd052722 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 30 Oct, 2018 5 commits
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Antonio Niño Díaz authored
poplar, warp7, ls1043: Decouple from plat/arm files
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Antonio Niño Díaz authored
Fix some MISRA defects
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Antonio Niño Díaz authored
docs: stm32mp1: complete compilation and flashing steps
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Antonio Nino Diaz authored
include/plat/arm/common isn't needed by them, and is removed to avoid dependency on Arm platform code. Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
plat/arm files should only be used by Arm platforms. If other platforms use them, they create dependencies that can introduce problems when updating Arm platforms. This patch copies the needed code from Arm platforms so that poplar can be independent from them. Change-Id: I0b194f5bdb0377b8ccacbd400e021614c026c7fe Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 29 Oct, 2018 15 commits
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Antonio Nino Diaz authored
No functional changes. Change-Id: I64abd72026082218a40b1a4b8f7dc26ff2478ba6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
No functional changes. Change-Id: Iaab0310848be587b635ce5339726e92a50f534e0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
No functional changes. Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
No functional changes. Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Soby Mathew authored
meson: console: Add missing define to fix build
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Antonio Nino Diaz authored
It isn't possible to build this driver without adding this define. Change-Id: Iba2ced411cd8ce438787871fa01b414d32b9aa42 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Soby Mathew authored
Position Indepedent Executable (PIE) Support
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Soby Mathew authored
Initial port of Amlogic Meson S905 (GXBB)
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Soby Mathew authored
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create a dynamic relocation entry in .rela.dyn and hence will be fixed up by dynamic linker at runtime. Also, we disable RECLAIM_INIT_CODE when PIE is enabled as the init section overlay creates some static relocations which cannot be handled by the dynamic linker currently. Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer. Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch introduces Position Independant Executable(PIE) support in TF-A. As a initial prototype, only BL31 can support PIE. A trivial dynamic linker is implemented which supports fixing up Global Offset Table(GOT) and Dynamic relocations(.rela.dyn). The fixup_gdt_reloc() helper function implements this linker and this needs to be called early in the boot sequence prior to invoking C functions. The GOT is placed in the RO section of BL31 binary for improved security and the BL31 linker script is modified to export the appropriate symbols required for the dynamic linker. The C compiler always generates PC relative addresses to linker symbols and hence referencing symbols exporting constants are a problem when relocating the binary. Hence the reference to the `__PERCPU_TIMESTAMP_SIZE__` symbol in PMF is removed and is now calculated at runtime based on start and end addresses. Change-Id: I1228583ff92cf432963b7cef052e95d995cca93d Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
Previously the errata reporting was optional for CPU operation files and this was achieved by making use of weak reference to resolve to 0 if the symbol is not defined. This is error prone when adding new CPU operation files and weak references are problematic when fixing up dynamic relocations. Hence this patch removes the weak reference and makes it mandatory for the CPU operation files to define the errata reporting function. Change-Id: I8af192e19b85b7cd8c7579e52f8f05a4294e5396 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch fixes up the AArch64 assembly code to use adrp/adr instructions instead of ldr instruction for reference to symbols. This allows these assembly sequences to be Position Independant. Note that the the reference to sizes have been replaced with calculation of size at runtime. This is because size is a constant value and does not depend on execution address and using PC relative instructions for loading them makes them relative to execution address. Also we cannot use `ldr` instruction to load size as it generates a dynamic relocation entry which must *not* be fixed up and it is difficult for a dynamic loader to differentiate which entries need to be skipped. Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
Change-Id: I0b8ccba15024c55bb03927cdb50370913eb8010c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference and this utility is used to override this compiler generated to code and use `ldr` instruction. This is needed for Position Independent Executable when it needs to reference a symbol which is constant and does not depend on the execute address of the binary. For example, on the FVP, the GICv3 register context is stored in a secure carveout (arm_el3_tzc_dram) within DDR and does not relocate with the BL image. Now if BL31 is executing at a different address other than the compiled address, using adrp/adr instructions to reference this memory will not work as they generate an address that is PC relative. The way to get around this problem is to reference it as non-PC relative (i.e non-relocatable location) via `ldr` instruction. Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 26 Oct, 2018 8 commits
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Antonio Niño Díaz authored
Improvements to setup page tables code
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Roberto Vargas authored
This function is not related to Arm platforms and can be reused by other platforms if needed. Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms. This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header. The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2. This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround). Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ie2465c1ccc482bd8eb5e5a71c580543095e4ba94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There seems to be a problem where SCP can't turn CPU0 off. Instead of returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This way all CPUs have a consistent behaviour from the point of view of the caller. Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop. Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
It has only been tested with a system clock of 24 MHz. It has only been implemented for the multi console API. Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Oct, 2018 9 commits
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Antonio Niño Díaz authored
Sgi575 update
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Antonio Niño Díaz authored
Deprecate weak crash console functions
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Antonio Niño Díaz authored
Multi-console: Deprecate the `finish_console_register` macro
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Antonio Nino Diaz authored
The default behaviour of the plat_crash_console_xxx functions isn't obvious to someone that hasn't read all the documentation. As they are not mandatory, it is unlikely that the code will be checked when doing a platform port, which may mean that some platforms may not have crash console support at all. The idea of this patch is to force platform maintainers to decide how the crash console has to behave so that the final behaviour isn't unexpected. Change-Id: I40b2a7b56c5530c1dcd63eace5bd37ae6335056e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This platform depends on weak functions defined in ``plat/common/aarch64/platform_helpers.S`` that are going to be removed. Change-Id: I5104d091c32271d77ed9690e9dc257c061289def Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Platforms that wish to use the sample functions have to add the file to their Makefile. It is not included by default. Change-Id: I713617bb58dc218967199248f68da86241d7ec40 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
In Arm platforms the crash console doesn't print anything if the crash happens early enough. This happens in all images, not only BL1. The reason is that they the files ``plat/common/aarch64/platform_helpers.S`` and ``plat/arm/common/aarch64/arm_helpers.S``, and the crash console functions are defined as weak in both files. In practice, the linker can pick the one in ``plat/common``, which simply switches the multi console to crash mode when it wants to initialize the crash console. In the case of Arm platforms, there are no console drivers registered at that point, so nothing is printed. This patch makes the functions in plat/arm strong so that they override the weak functions in plat/common. Change-Id: Id358db7d2567d7df0951790a695636cf6c9ac57f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Even though at this point plat_crash_console_flush is optional, it will stop being optional in a following patch. The console driver of warp7 doesn't support flush, so the implementation is a placeholder. TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but they weren't global so they weren't actually used. Also, they were calling the wrong functions. imx8_helpers.S only has placeholders for all of the functions. Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Non-Arm platforms shouldn't use Arm platform code. This patch copies the implementation of the functions in arm_helpers.S to zynqmp_helpers.S to remove this dependency of zynqmp on Arm platforms. Change-Id: Ia85f303c4c63bcf0ffa57c7f3ef9d88376729b6b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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