- 17 Dec, 2019 1 commit
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Heiko Stuebner authored
The agreed upon division of early boot locations is 0x40000 for bl31 to leave enough room for u-boot-spl and 0x100000 for bl33 (u-boot). rk3288 and rk3399 already correctly secure the ddr up to the 1MB boundary so pull the other platforms along to also give the Rockchip TF-A enough room to comfortably live in. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Change-Id: Ie9e0c927d3074a418b6fd23b599d2ed7c15c8c6f
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- 20 Sep, 2019 2 commits
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Kever Yang authored
Rockchip platform is using the first 1MB of DRAM as secure ram space, and there is a vendor loader who loads and runs the BL31/BL32/BL33, this loader is usually load by SoC BootRom to the start addres of DRAM, we need to reserve enough space for this loader so that it doesn't need to do the relocate when loading the BL31. eg. We use U-Boot SPL to load ATF BL31 and U-Boot proper as BL33, the SPL TEXT BASE is offset 0 of DRAM which is decide by Bootrom; if we update the BL31_BASE to offset 0x40000(256KB), then the 0~0x40000 should be enough for SPL and no need to do the relocate while the space size 0x10000(64KB) may not enough for SPL. After this update, the BL31 can use the rest 768KB of the first 1MB, which is also enough, and the loader who is using BL31 elf file can support this update without any change. Change-Id: I66dc685594d77f10f9a49c3be015fd6729250ece Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Kever Yang authored
The 'txet' should be 'text'. Change-Id: I2217a1adf50c3b86f3087b83c77d9291b280627c Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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- 01 May, 2019 1 commit
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Christoph Müllner authored
In order to set the UART base during bootup in common code of plat/rockchip, we need to streamline the way the UART base addresses are defined and add the missing definitions and mappings. This patch does so by following the pattern UARTn_BASE, which is already in use on RK3399 and RK3328. The numbering itself is derived from the upstream Linux DTS files of the individual SoCs. Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Use bl31_warm_entrypoint() instead of psci_entrypoint(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Update Makefile paths. - Remove references to removed build options. - Use private definition of bl31_params_t. Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 01 Nov, 2017 1 commit
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Roberto Vargas authored
These macros are only defined for corresponding image, and they are undefined for other images. It means that we have to use ifdef or defined() instead of relying on being 0 by default. Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 08 Jun, 2017 2 commits
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Lin Huang authored
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need to check wakeup cpu when resume. Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff Signed-off-by: Lin Huang <hl@rock-chips.com>
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Lin Huang authored
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 10 May, 2017 1 commit
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dp-arm authored
Change-Id: I7f54f45db65f32481cc05e1bd2c9c683b756e19a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 25 Apr, 2017 1 commit
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tony.xie authored
rk3328 is a Quad-core soc and Cortex-a53 inside! This patch supports the following functions: 1、power up/off cpus 2、suspend/resume cpus 3、suspend/resume system 4、reset system 5、power off system Change-Id: I60687058d13912c6929293b06fed9c6bc72bdc84 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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