- 30 Jan, 2018 1 commit
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Haojian Zhuang authored
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR. Since MAP_OPTEE_PAGEABLE isn't used in SRAM case, just remove it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 01 Nov, 2017 1 commit
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Roberto Vargas authored
These macros are only defined for corresponding image, and they are undefined for other images. It means that we have to use ifdef or defined() instead of relying on being 0 by default. Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 01 Sep, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 12 Jul, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 24 May, 2017 1 commit
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Haojian Zhuang authored
Initialize regulators, pins and eMMC in BL1. Only SRAM could be used in BL1. So BL2 will be loaded from eMMC into SRAM later. Change-Id: I8e7ef82ffa29a3c647c9d2d2981e8759ee85d833 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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