- 12 Jun, 2021 1 commit
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Peng Fan authored
Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled routing. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Change-Id: Ie15fffdd09e1bba1b22334b8ccac2335c96b8b4d
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- 19 Aug, 2020 1 commit
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Jacky Bai authored
The number of gpc imr mask reg & the offset is different on some SOC, so correct it & replace the magic number with macro define. Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74
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- 10 Jul, 2020 1 commit
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Jacky Bai authored
Although the GPC provides the similar functions for all the i.MX8M SoC family, the HW register offset and bit defines still have some slight difference, so move the hw reg offset & most of the bitfield defines in 'gpc_reg.h' that is specific to each SoC. Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Change-Id: I291c435fe98c2f6e6ff8fe0c715ff3a83daa6a0f
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- 22 May, 2020 1 commit
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Jacky Bai authored
Add imx8mn basic support Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Change-Id: Ibdfcc87700bfaf980e429f3a5fa08515218ae78d
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