- 08 Jan, 2020 1 commit
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Mark Dykes authored
This reverts commit de9bf1d8. Change-Id: Iebb6297ce290a10ee850bf6a9c71e7eb530b085f
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- 03 Jan, 2020 1 commit
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Madhukar Pappireddy authored
This toolchain provides multiple cross compilers and are publicly available on www.developer.arm.com We thoroughly test TF-A in CI using: AArch32 bare-metal target (arm-none-eabi) AArch64 ELF bare-metal target (aarch64-none-elf) Change-Id: I2360a3ac6705c68dca781b85e9894867df255b3e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 25 Sep, 2019 1 commit
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Paul Beesley authored
This patch: - Adds any leftover platform ports that were not having their documentation built (not in the index.rst table of contents) - Corrects a handful of RST formatting errors that cause poor rendering - Reorders the list of platforms so that they are displayed in alphabetical order Change-Id: If8c135a822d581c3c5c4fca2936d501ccfd2e94c Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 22 May, 2019 1 commit
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Paul Beesley authored
The platform port documents are not very standardised right now and they don't integrate properly into the document tree so: 1) Make sure each port has a proper name and title (incl. owner) 2) Correct use of headings, subheadings, etc in each port 3) Resolve any naming conflicts between documents Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 26 Feb, 2019 1 commit
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Tien Hock, Loh authored
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A supports: - PSCI calls to enable 4 CPU cores - PSCI mailbox calls for FPGA reconfiguration Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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