- 09 May, 2018 1 commit
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Roberto Vargas authored
When TF is compiled for aarch32 MAX_VIRT_ADDR_SPACE_SIZE is 2^32 in some cases, which makes the test (size) <= MAX_VIRT_ADDR_SPACE_SIZE a tautology because uintptr_t is a 32 bit value. The cast remove the warning for clang. Change-Id: I1345f3400f8fbbe4ffd3caa990a90e7ba593dba5 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 26 Apr, 2018 1 commit
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Antonio Nino Diaz authored
According to the ARMv8 ARM issue C.a: AP[1] is valid only for stage 1 of a translation regime that can support two VA ranges. It is RES 1 when stage 1 translations can support only one VA range. This means that, even though this bit is ignored, it should be set to 1 in the EL3 and EL2 translation regimes. For translation regimes consisting on EL0 and a higher regime this bit selects between control at EL0 or at the higher Exception level. The regimes that support two VA ranges are EL1&0 and EL2&0 (the later one is only available since ARMv8.1). This fix has to be applied to both versions of the translation tables library. Change-Id: If19aaf588551bac7aeb6e9a686cf0c2068e7c181 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 17 Apr, 2018 1 commit
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Antonio Nino Diaz authored
Change-Id: I989c1f4aef8e3cb20d5d19e6347575e6449bb60b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 27 Feb, 2018 1 commit
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Antonio Nino Diaz authored
When the MMU is enabled and the translation tables are mapped, data read/writes to the translation tables are made using the attributes specified in the translation tables themselves. However, the MMU performs table walks with the attributes specified in TCR_ELx. They are completely independent, so special care has to be taken to make sure that they are the same. This has to be done manually because it is not practical to have a test in the code. Such a test would need to know the virtual memory region that contains the translation tables and check that for all of the tables the attributes match the ones in TCR_ELx. As the tables may not even be mapped at all, this isn't a test that can be made generic. The flags used by enable_mmu_xxx() have been moved to the same header where the functions are. Also, some comments in the linker scripts related to the translation tables have been fixed. Change-Id: I1754768bffdae75f53561b1c4a5baf043b45a304 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Jan, 2018 1 commit
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Roberto Vargas authored
This patch enables BL2 to execute at the highest exception level without any dependancy on TF BL1. This enables platforms which already have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL stages without need for BL1. This is not currently possible because BL2 executes at S-EL1 and cannot jump straight to EL3. Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 06 Dec, 2017 1 commit
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Antonio Nino Diaz authored
A new platform define, `PLAT_SP_IMAGE_XLAT_SECTION_NAME`, has been introduced to select the section where the translation tables used by the S-EL1/S-EL0 are placed. This define has been used to move the translation tables to DRAM secured by TrustZone. Most of the extra needed space in BL31 when SPM is enabled is due to the large size of the translation tables. By moving them to this memory region we can save 44 KiB. A new argument has been added to REGISTER_XLAT_CONTEXT2() to specify the region where the translation tables have to be placed by the linker. Change-Id: Ia81709b4227cb8c92601f0caf258f624c0467719 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Nov, 2017 1 commit
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Antonio Nino Diaz authored
This function can be useful to setup TCR_ELx by callers that don't use the translation tables library to setup the system registers related to them. By making it common, it can be reused whenever it is needed without duplicating code. Change-Id: Ibfada9e846d2a6cd113b1925ac911bb27327d375 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 01 Nov, 2017 1 commit
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Roberto Vargas authored
These macros are only defined for corresponding image, and they are undefined for other images. It means that we have to use ifdef or defined() instead of relying on being 0 by default. Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 17 Oct, 2017 3 commits
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Sandrine Bailleux authored
This patch introduces a new API in the translation tables library (v2), that allows to change the memory attributes of a memory region. It may be used to change its execution permissions and data access permissions. As a prerequisite, the memory must be already mapped. Moreover, it must be mapped at the finest granularity (currently 4 KB). Change-Id: I242a8c6f0f3ef2b0a81a61e28706540462faca3c Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
This patch introduces a new API in the translation tables library (v2), that allows to query the memory attributes of a memory block or a memory page. Change-Id: I45a8b39a53da39e7617cbac4bff5658dc1b20a11 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Previously, in AArch32, `IMAGE_XLAT_DEFAULT_REGIME` wasn't defined. The translation regime is only used in the AArch64 port of the translation tables library v2, so this is not a problem for now, but future patches will use it. `IMAGE_EL` isn't used in AArch32, so it isn't needed to define it. Change-Id: I4acdb01a58658956ab94bd82ed5b7fee1aa6ba90 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Oct, 2017 3 commits
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Antonio Nino Diaz authored
This patch introduces the ability of the xlat tables library to manage EL0 and EL1 mappings from a higher exception level. Attributes MT_USER and MT_PRIVILEGED have been added to allow the user specify the target EL in the translation regime EL1&0. REGISTER_XLAT_CONTEXT2 macro is introduced to allow creating a xlat_ctx_t that targets a given translation regime (EL1&0 or EL3). A new member is added to xlat_ctx_t to represent the translation regime the xlat_ctx_t manages. The execute_never mask member is removed as it is computed from existing information. Change-Id: I95e14abc3371d7a6d6a358cc54c688aa9975c110 Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Douglas Raillard authored
Introduce a variant of the TLB invalidation helper function that allows the targeted translation regime to be specified, rather than defaulting to the current one. This new function is useful in the context of EL3 software managing translation tables for the S-EL1&0 translation regime, as then it might need to invalidate S-EL1&0 TLB entries rather than EL3 ones. Define a new enumeration to be able to represent translation regimes in the xlat tables library. Change-Id: Ibe4438dbea2d7a6e7470bfb68ff805d8bf6b07e5 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
The current implementation of the memory mapping API favours mapping memory regions using the biggest possible block size in order to reduce the number of translation tables needed. In some cases, this behaviour might not be desirable. When translation tables are edited at run-time, coarse-grain mappings like that might need splitting into finer-grain tables. This operation has a performance cost. The MAP_REGION2() macro allows to specify the granularity of translation tables used for the initial mapping of a memory region. This might increase performance for memory regions that are likely to be edited in the future, at the expense of a potentially increased memory footprint. The Translation Tables Library Design Guide has been updated to explain the use case for this macro. Also added a few intermediate titles to make the guide easier to digest. Change-Id: I04de9302e0ee3d326b8877043a9f638766b81b7b Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Sep, 2017 1 commit
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Masahiro Yamada authored
Since commit 769d65da ("xlat: Use MAP_REGION macro as compatibility layer"), building with GCC 4.9 fails. CC plat/arm/board/fvp/fvp_common.c plat/arm/board/fvp/fvp_common.c:60:2: error: initializer element is not constant ARM_MAP_SHARED_RAM, ^ plat/arm/board/fvp/fvp_common.c:60:2: error: (near initialization for 'plat_arm_mmap[0]') make: *** [Makefile:535: build/fvp/release/bl1/fvp_common.o] Error 1 Taking into account that MAP_REGION(_FLAT) is widely used in array initializers, do not use cast. Fixes: 769d65da ("xlat: Use MAP_REGION macro as compatibility layer") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 11 Sep, 2017 2 commits
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Isla Mitchell authored
This patch provides helper macros for both Device and Normal memory MAIR encodings as defined by the ARM Architecture Reference Manual for ARMv8-A (ARM DDI0487B.A). Change-Id: I5faae7f2cf366390ad4ba1d9253c6f3b60fd5e20 Signed-off-by: David Cunado <david.cunado@arm.com>
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Douglas Raillard authored
Use the MAP_REGION to build the mmap_region_t argument in wrappers like mmap_add_region(). Evolution of the mmap_region_t might require adding new members with a non-zero default value. Users of MAP_REGION are protected against such evolution. This commit also protects users of mmap_add_region() and mmap_add_dynamic_region() functions against these evolutions. Also make the MAP_REGION macro implementation more explicit and make it a mmap_region_t compound literal to make it useable as a function parameter on its own and to prevent using it in initialization of variables of different type. Change-Id: I7bfc4689f6dd4dd23c895b65f628d8ee991fc161 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 26 Jul, 2017 3 commits
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Sandrine Bailleux authored
At the moment, various parts of the Trusted Firmware code assume that the granule size used is 4 KB. For example, the linker scripts enforce 4 KB alignment restrictions on some sections. However, the ARMv8-A architecture allows 16 KB and 64 KB granule sizes as well. Some other parts of the TF code, particularly the architectural code and definitions, have been implemented with this in mind and cater for all 3 cases. This discrepancy creates some confusion as to what is effectively supported in TF. This patch adds some code comments and clarification in the documentation to make this limitation clearer. Change-Id: I1f202369b240d8bed9d43d57ecd2a548c86c8598 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Fix the type length and signedness of some of the constants and variables used in the translation table library. This patch supersedes Pull Request #1018: https://github.com/ARM-software/arm-trusted-firmware/pull/1018 Change-Id: Ibd45faf7a4fb428a0bf71c752551d35800212fb2 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
In a previous patch, the xlat_ctx_t type has been made public. This patch now makes the *_ctx() APIs public. Each API now has a *_ctx() variant. Most of them were already implemented and this patch just makes them public. However, some of them were missing so this patch introduces them. Now that all these APIs are public, there's no good reason for splitting them accross 2 files (xlat_tables_internal.c and xlat_tables_common.c). Therefore, this patch moves all code into xlat_tables_internal.c and removes xlat_tables_common.c. It removes it from the library's makefile as well. This last change introduces a compatibility break for platform ports that specifically include the xlat_tables_common.c file instead of including the library's Makefile. The UniPhier platform makefile has been updated to now omit this file from the list of source files. The prototype of mmap_add_region_ctx() has been slightly changed. The mmap_region_t passed in argument needs to be constant because it gets called from map_add(), which receives a constant region. The former implementation of mmap_add() used to cast the const qualifier away, which is not a good practice. Also remove init_xlation_table(), which was a sub-function of init_xlat_tables(). Now there's just init_xlat_tables() (and init_xlat_tables_ctx()). Both names were too similar, which was confusing. Besides, now that all the code is in a single file, it's no longer needed to have 2 functions for that. Change-Id: I4ed88c68e44561c3902fbebb89cb197279c5293b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 25 Jul, 2017 2 commits
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Sandrine Bailleux authored
At the moment, the translation context type (xlat_ctx_t) is a private type reserved for the internal usage of the translation table library. All exported APIs (implemented in xlat_tables_common.c) are wrappers over the internal implementations that use such a translation context. These wrappers unconditionally pass the current translation context representing the memory mappings of the executing BL image. This means that the caller has no control over which translation context the library functions act on. As a first step to make this code more flexible, this patch exports the 'xlat_ctx_t' type. Note that, although the declaration of this type is now public, its definition stays private. A macro is introduced to statically allocate and initialize such a translation context. The library now internally uses this macro to allocate the default translation context for the running BL image. Change-Id: Icece1cde4813fac19452c782b682c758142b1489 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Move the header files that provide translation tables architectural definitions from the library v2 source files to the library include directory. This allows to share these definitions between both versions (v1 and v2) of the library. Create a new header file that includes the AArch32 or AArch64 definitions based on the AARCH32 build flag, so that the library user doesn't have to worry about handling it on their side. Also repurpose some of the definitions the header files provide to concentrate on the things that differ between AArch32 and AArch64. As a result they now contain the following information: - the first table level that allows block descriptors; - the architectural limits of the virtual address space; - the initial lookup level to cover the entire address space. Additionally, move the XLAT_TABLE_LEVEL_MIN macro from xlat_tables_defs.h to the AArch32/AArch64 architectural definitions. This new organisation eliminates duplicated information in the AArch32 and AArch64 versions. It also decouples these architectural files from any platform-specific information. Previously, they were dependent on the address space size, which is platform-specific. Finally, for the v2 of the library, move the compatibility code for ADDR_SPACE_SIZE into a C file as it is not needed outside of this file. For v1, this code hasn't been changed and stays in a header file because it's needed by several files. Change-Id: If746c684acd80eebf918abd3ab6e8481d004ac68 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 15 Jun, 2017 1 commit
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Varun Wadekar authored
This patch uses the U() and ULL() macros for constants, to fix some of the signed-ness defects flagged by the MISRA scanner. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 09 May, 2017 1 commit
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Antonio Nino Diaz authored
- Fix some comments. - Remove duplicated definition. - Make xlat_arch_get_max_supported_pa() private in aarch64. Change-Id: I629237209cfb2ce7b0c4bd539d63dd81d45b2edd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 02 May, 2017 1 commit
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Antonio Nino Diaz authored
Translation regimes that only support one virtual address space (such as the ones for EL2 and EL3) can flag memory regions as execute-never by setting to 1 the XN bit in the Upper Attributes field in the translation tables descriptors. Translation regimes that support two different virtual address spaces (such as the one shared by EL1 and EL0) use bits PXN and UXN instead. The Trusted Firmware runs at EL3 and EL1, it has to handle translation tables of both translation regimes, but the previous code handled both regimes the same way, as if both had only 1 VA range. When trying to set a descriptor as execute-never it would set the XN bit correctly in EL3, but it would set the XN bit in EL1 as well. XN is at the same bit position as UXN, which means that EL0 was being prevented from executing code at this region, not EL1 as the code intended. Therefore, the PXN bit was unset to 0 all the time. The result is that, in AArch64 mode, read-only data sections of BL2 weren't protected from being executed. This patch adds support of translation regimes with two virtual address spaces to both versions of the translation tables library, fixing the execute-never permissions for translation tables in EL1. The library currently does not support initializing translation tables for EL0 software, therefore it does not set/unset the UXN bit. If EL1 software needs to initialize translation tables for EL0 software, it should use a different library instead. Change-Id: If27588f9820ff42988851d90dc92801c8ecbe0c9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 29 Apr, 2017 1 commit
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Scott Branden authored
utils.h is included in various header files for the defines in it. Some of the other header files only contain defines. This allows the header files to be shared between host and target builds for shared defines. Recently types.h has been included in utils.h as well as some function prototypes. Because of the inclusion of types.h conflicts exist building host tools abd these header files now. To solve this problem, move the defines to utils_def.h and have this included by utils.h and change header files to only include utils_def.h and not pick up the new types.h being introduced. Fixes ARM-software/tf-issues#461 Signed-off-by: Scott Branden <scott.branden@broadcom.com> Remove utils_def.h from utils.h This patch removes utils_def.h from utils.h as it is not required. And also makes a minor change to ensure Juno platform compiles. Change-Id: I10cf1fb51e44a8fa6dcec02980354eb9ecc9fa29
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- 20 Apr, 2017 1 commit
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Sandrine Bailleux authored
This patch modifies both versions of the translation table library to use the mmap_attr_t type consistently wherever it is manipulating MT_* attributes variables. It used to use mmap_attr_t or plain integer types interchangeably, which compiles fine because an enumeration type can be silently converted to an integer, but which is semantically incorrect. This patch removes this assumption by using the abstract type 'mmap_attr_t' all the time. Change-Id: Id1f099025d2cb962b275bb7e39ad2c4dbb4e366c Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 28 Mar, 2017 1 commit
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Summer Qin authored
This patch adds an additional flag `XLAT_TABLE_NC` which marks the translation tables as Non-cacheable for MMU accesses. Change-Id: I7c28ab87f0ce67da237fadc3627beb6792860fd4 Signed-off-by: Summer Qin <summer.qin@arm.com>
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- 08 Mar, 2017 2 commits
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Antonio Nino Diaz authored
Added APIs to add and remove regions to the translation tables dynamically while the MMU is enabled. Only static regions are allowed to overlap other static ones (for backwards compatibility). A new private attribute (MT_DYNAMIC / MT_STATIC) has been added to flag each region as such. The dynamic mapping functionality can be enabled or disabled when compiling by setting the build option PLAT_XLAT_TABLES_DYNAMIC to 1 or 0. This can be done per-image. TLB maintenance code during dynamic table mapping and unmapping has also been added. Fixes ARM-software/tf-issues#310 Change-Id: I19e8992005c4292297a382824394490c5387aa3b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The folder lib/xlat_tables_v2 has been created to store a new version of the translation tables library for further modifications in patches to follow. At the moment it only contains a basic implementation that supports static regions. This library allows different translation tables to be modified by using different 'contexts'. For now, the implementation defaults to the translation tables used by the current image, but it is possible to modify other tables than the ones in use. Added a new API to print debug information for the current state of the translation tables, rather than printing the information while the tables are being created. This allows subsequent debug printing of the xlat tables after they have been changed, which will be useful when dynamic regions are implemented in a patch to follow. The common definitions stored in `xlat_tables.h` header have been moved to a new file common to both versions, `xlat_tables_defs.h`. All headers related to the translation tables library have been moved to a the subfolder `xlat_tables`. Change-Id: Ia55962c33e0b781831d43a548e505206dffc5ea9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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