- 20 Oct, 2018 5 commits
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Andre Przywara authored
In the H6 platform code there is a routine to do the platform initialisation of the R_I2C controller. We will need a very similar setup routine to initialise the RSB controller on the A64. Move this code to sunxi_common.c and generalise it to support all SoCs and also to cover the related RSB bus. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
Many boards without a dedicated PMIC contain simple regulators, which can be controlled via GPIO pins. To later allow turning them off easily, introduce a simple function to configure a given pin as a GPIO out pin and set it to the desired level. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
So far we have a sunxi_private.h header file in the common code directory. This holds the prototypes of various functions we share in *common* code. However we will need some of those in the platform specific code parts as well, and want to introduce new functions shared across the whole platform port. So move the sunxi_private.h file into the common/include directory, so that it becomes visible to all parts of the platform code. Fix up the existing #includes and add missing ones, also add the sunxi_read_soc_id() prototype here. This will be used in follow up patches. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
According to the documentation, platforms may choose to trade memory footprint for performance (and elegancy) by not providing a separately mapped coherent page. Since a debug build is getting close to the SRAM size limit already, this allows us to save about 3.5KB of BSS and have some room for future enhancements. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
At the moment we map as much of the DRAM into EL3 as possible, however we actually don't use it. The only exception is the secure DRAM for BL32 (if that is configured). To decrease the memory footprint of ATF, we save on some page tables by reducing the memory mapping to the actually required regions: SRAM, device MMIO, secure DRAM and U-Boot (to be used later). This introduces a non-identity mapping for the DRAM regions. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 28 Jun, 2018 3 commits
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Andre Przywara authored
So far we already support booting on two different SoCs, and we will shortly add a third, so add some code to determine the current SoC type. This can be later used to runtime detect certain properties. Also print the SoC name to the console, to give valuable debug information. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
There is nothing we need from the BootROM area, so we also don't need to map it in EL3. Remove the mapping and reduce the number of MMAP regions by one. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
Some code in sunxi_common.c requires symbols defined in sunxi_private.h, so add the header to that file. It was included via another header before, but let's make this explicit. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 15 Jun, 2018 1 commit
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Samuel Holland authored
This platform supports Allwinner's SoCs with ARMv8 cores. So far they all sport a single cluster of Cortex-A53 cores. "sunxi" is the original code name used for this platform, and since it appears in the Linux kernel and in U-Boot as well, we use it here as a short file name prefix and for identifiers. This port includes BL31 support only. U-Boot's SPL takes the role of the primary loader, also doing the DRAM initialization. It then loads the rest of the firmware, namely ATF and U-Boot (BL33), then hands execution over to ATF. This commit includes the basic platform code shared across all SoCs. There is no platform.mk yet. [Andre: moved files into proper directories, supported RESET_TO_BL31, various clean ups and simplifications ] Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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