1. 12 Oct, 2020 1 commit
    • Jimmy Brisson's avatar
      Increase type widths to satisfy width requirements · d7b5f408
      Jimmy Brisson authored
      
      
      Usually, C has no problem up-converting types to larger bit sizes. MISRA
      rule 10.7 requires that you not do this, or be very explicit about this.
      This resolves the following required rule:
      
          bl1/aarch64/bl1_context_mgmt.c:81:[MISRA C-2012 Rule 10.7 (required)]<None>
          The width of the composite expression "0U | ((mode & 3U) << 2U) | 1U |
          0x3c0U" (32 bits) is less that the right hand operand
          "18446744073709547519ULL" (64 bits).
      
      This also resolves MISRA defects such as:
      
          bl2/aarch64/bl2arch_setup.c:18:[MISRA C-2012 Rule 12.2 (required)]
          In the expression "3U << 20", shifting more than 7 bits, the number
          of bits in the essential type of the left expression, "3U", is
          not allowed.
      
      Further, MISRA requires that all shifts don't overflow. The definition of
      PAGE_SIZE was (1U << 12), and 1U is 8 bits. This caused about 50 issues.
      This fixes the violation by changing the definition to 1UL << 12. Since
      this uses 32bits, it should not create any issues for aarch32.
      
      This patch also contains a fix for a build failure in the sun50i_a64
      platform. Specifically, these misra fixes removed a single and
      instruction,
      
          92407e73        and     x19, x19, #0xffffffff
      
      from the cm_setup_context function caused a relocation in
      psci_cpus_on_start to require a linker-generated stub. This increased the
      size of the .text section and caused an alignment later on to go over a
      page boundary and round up to the end of RAM before placing the .data
      section. This sectionn is of non-zero size and therefore causes a link
      error.
      
      The fix included in this reorders the functions during link time
      without changing their ording with respect to alignment.
      
      Change-Id: I76b4b662c3d262296728a8b9aab7a33b02087f16
      Signed-off-by: default avatarJimmy Brisson <jimmy.brisson@arm.com>
      d7b5f408
  2. 25 Mar, 2020 1 commit
    • Manish V Badarkhe's avatar
      Fix 'tautological-constant-compare' error · 4c4a1327
      Manish V Badarkhe authored
      
      
      Fixed below 'tautological-constant-compare' error when building the source
      code with latest clang compiler <clang version 11.0.0>.
      
      plat/common/plat_psci_common.c:36:2:
      error: converting the result of '<<' to a boolean always evaluates
      to true [-Werror,-Wtautological-constant-compare]
              PMF_STORE_ENABLE)
              ^
      include/lib/pmf/pmf.h:28:29: note: expanded from macro 'PMF_STORE_ENABLE'
      PMF_STORE_ENABLE        (1 << 0)
      
      This error is observed beacuse of CASSERT placed in
      "PMF_DEFINE_CAPTURE_TIMESTAMP" which do below stuff:
      CASSERT(_flags, select_proper_config);
      where _flags = PMF_STORE_ENABLE (1 << 0) which always results true.
      Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
      Change-Id: Ifa82ea202496a23fdf1d27ea1798d1f1b583a021
      4c4a1327
  3. 09 Jan, 2020 1 commit
  4. 17 Dec, 2019 1 commit
  5. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  6. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  7. 29 Oct, 2018 2 commits
    • Antonio Nino Diaz's avatar
      Fix MISRA defects in PMF · 195e363f
      Antonio Nino Diaz authored
      
      
      No functional changes.
      
      Change-Id: I64abd72026082218a40b1a4b8f7dc26ff2478ba6
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      195e363f
    • Soby Mathew's avatar
      PIE: Use PC relative adrp/adr for symbol reference · f1722b69
      Soby Mathew authored
      
      
      This patch fixes up the AArch64 assembly code to use
      adrp/adr instructions instead of ldr instruction for
      reference to symbols. This allows these assembly
      sequences to be Position Independant. Note that the
      the reference to sizes have been replaced with
      calculation of size at runtime. This is because size
      is a constant value and does not depend on execution
      address and using PC relative instructions for loading
      them makes them relative to execution address. Also
      we cannot use `ldr` instruction to load size as it
      generates a dynamic relocation entry which must *not*
      be fixed up and it is difficult for a dynamic loader
      to differentiate which entries need to be skipped.
      
      Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      f1722b69
  8. 04 Oct, 2018 1 commit
  9. 20 Jul, 2018 1 commit
  10. 26 Mar, 2018 1 commit
  11. 28 Feb, 2018 2 commits
  12. 12 Jul, 2017 1 commit
    • Isla Mitchell's avatar
      Fix order of #includes · 2a4b4b71
      Isla Mitchell authored
      
      
      This fix modifies the order of system includes to meet the ARM TF coding
      standard. There are some exceptions in order to retain header groupings,
      minimise changes to imported headers, and where there are headers within
      the #if and #ifndef statements.
      
      Change-Id: I65085a142ba6a83792b26efb47df1329153f1624
      Signed-off-by: default avatarIsla Mitchell <isla.mitchell@arm.com>
      2a4b4b71
  13. 03 May, 2017 1 commit
  14. 02 Feb, 2017 1 commit
    • dp-arm's avatar
      PMF: Fixup PMF constants · 888037e5
      dp-arm authored
      
      
      `PMF_ARM_TIF_IMPL_ID` should be set to 0x41.  The code already left
      shifts it by 24 bit positions so this was overflowing.
      
      This fixes a build error with GCC 6.2 when
      `ENABLE_RUNTIME_INSTRUMENTATION` is set.
      
      Change-Id: I4c99d48ea7ce3d76e9edd1325b1979994db2c0fb
      Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
      888037e5
  15. 12 Oct, 2016 1 commit
    • dp-arm's avatar
      Add PMF instrumentation points in TF · 872be88a
      dp-arm authored
      
      
      In order to quantify the overall time spent in the PSCI software
      implementation, an initial collection of PMF instrumentation points
      has been added.
      
      Instrumentation has been added to the following code paths:
      
      - Entry to PSCI SMC handler.  The timestamp is captured as early
        as possible during the runtime exception and stored in memory
        before entering the PSCI SMC handler.
      
      - Exit from PSCI SMC handler.  The timestamp is captured after
        normal return from the PSCI SMC handler or if a low power state
        was requested it is captured in the bl31 warm boot path before
        return to normal world.
      
      - Entry to low power state.  The timestamp is captured before entry
        to a low power state which implies either standby or power down.
        As these power states are mutually exclusive, only one timestamp
        is defined to describe both.  It is possible to differentiate between
        the two power states using the PSCI STAT interface.
      
      - Exit from low power state.  The timestamp is captured after a standby
        or power up operation has completed.
      
      To calculate the number of cycles spent running code in Trusted Firmware
      one can perform the following calculation:
      
      (exit_psci - enter_psci) - (exit_low_pwr - enter_low_pwr).
      
      The resulting number of cycles can be converted to time given the
      frequency of the counter.
      
      Change-Id: Ie3b8f3d16409b6703747093b3a2d5c7429ad0166
      Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
      872be88a
  16. 14 Sep, 2016 2 commits
    • dp-arm's avatar
      Ensure PMF service timestamps are properly aligned on a cache line boundary · 2d84b46e
      dp-arm authored
      When using more than a single service in PMF, it is necessary that the
      per-service timestamps begin on a cache line boundary.  Previously it
      was possible that two services shared a cache line for their
      timestamps.  This made it difficult to reason about cache maintenance
      operations within a single service and required a global understanding
      of how all services operate.
      
      Change-Id: Iacaae5154a7e19ad4107468e56df9ad082ee371c
      2d84b46e
    • dp-arm's avatar
      Rename `pmf_calc_timestamp_offset` to `pmf_calc_timestamp_addr` · d2e201b4
      dp-arm authored
      The macro calculates an absolute address rather than an offset so
      rename it to avoid confusion.
      
      Change-Id: I351f73dfd809fd28c0c30d38928caf5c5cd1af04
      d2e201b4
  17. 26 Aug, 2016 2 commits
    • dp-arm's avatar
      Add assembler helper to calculate PMF timestamp offset · 5695cfe7
      dp-arm authored
      Given the service name and timestamp id, this assembler macro
      calculates the offset into a memory region where the per-cpu timestamp
      value is located.
      
      Change-Id: I47f6dfa2a17be182675e2ca0489d6eed42433209
      5695cfe7
    • dp-arm's avatar
      Move pmf headers to include/lib/pmf · afdda571
      dp-arm authored
      More headers will be needed soon so better to move these to their own
      directory to avoid cluttering include/lib.
      
      Change-Id: I6a72dc5b602d6f51954cf60aadd1beb52a268670
      afdda571