1. 26 Feb, 2018 3 commits
    • Soby Mathew's avatar
      Dynamic cfg: MISRA fixes · da5f2745
      Soby Mathew authored
      
      
      Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      da5f2745
    • Soby Mathew's avatar
      ARM Platforms: Load HW_CONFIG in BL2 · cab0b5b0
      Soby Mathew authored
      
      
      The patch adds the necessary changes to load HW_CONFIG in BL2 for
      ARM Platforms :
      
      1. The load address of HW_CONFIG is specified via the `hw_config_addr`
      property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size`
      property defines the maximum size to be expected for the HW_CONFIG.
      The `arm_dyn_cfg_helpers.c` and corresponding header implements
      utility functions to parse these DT properties defined.
      The `arm_dyn_cfg.c` implements wrappers to these helpers to enable
      them to be invoked from ARM platform layer.
      
      2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is
      the list of images to be loaded by BL2.
      
      3. The `libfdt` sources are now included when BL2 is built
      
      4. A new helper `populate_next_bl_params_config()` is introduced in
      desc_image_load.c to populate the subsequent executable BL images
      with the `hw_config` and the corresponding `fw_config` if available.
      The `plat_get_next_bl_params()` API for ARM platforms is modified to
      invoke this new helper.
      
      5. The implementation of `bl2_early_platform_setup2()` is modified to
      consider `arg0` as well in addition to `arg1` passed from BL1.
      
      6. Bump up the BL2 size for Juno to accommodate the inclusion of libfdt.
      
      Change-Id: I80f1554adec41753e0d179a5237364f04fe13a3f
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      cab0b5b0
    • Soby Mathew's avatar
      Dynamic cfg: Introduce fdt wrappers · e5674e1f
      Soby Mathew authored
      
      
      Change-Id: I9b1cdaf2430a1998a69aa366ea1461224a3d43dc
      Co-Authoured-by: default avatarJeenu Viswambharan <Jeenu.Viswambharan@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      e5674e1f
  2. 01 Feb, 2018 1 commit
    • Masahiro Yamada's avatar
      image_decompress: add APIs for decompressing images · 2e379d2f
      Masahiro Yamada authored
      
      
      These APIs are used by platforms that need to decompress images.
      
      image_decompress_init():
        This registers a temporary buffer and a decompressor callback.
        This should be called from platform init code.
      
      image_decompress_prepare():
        This should be called before each compressed image is loaded.  The
        best location to call this will be bl*_plat_handle_pre_image_load().
      
      image_decompress():
        This should be called after each compressed image is loaded.  The
        best location to call this will be bl*_plat_handle_post_image_load().
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      2e379d2f
  3. 15 Dec, 2017 1 commit
  4. 05 Dec, 2017 1 commit
    • Soby Mathew's avatar
      Unify cache flush code path after image load · 76163b3a
      Soby Mathew authored
      
      
      Previously the cache flush happened in 2 different places in code
      depending on whether TRUSTED_BOARD_BOOT is enabled or not. This
      patch unifies this code path for both the cases. The `load_image()`
      function is now made an internal static function.
      
      Change-Id: I96a1da29d29236bbc34b1c95053e6a9a7fc98a54
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      76163b3a
  5. 08 Nov, 2017 1 commit
    • Etienne Carriere's avatar
      ARMv7 may not support Virtualization Extensions · 64cc6e91
      Etienne Carriere authored
      
      
      ARMv7-A Virtualization extensions brings new instructions and resources
      that were supported by later architectures. Reference ARM ARM Issue C.c
      [DDI0406C_C].
      
      ERET and extended MSR/MRS instructions, as specified in [DDI0406C_C] in
      ID_PFR1 description of bits[15:12] (Virtualization Extensions):
       A value of 0b0001 implies implementation of the HVC, ERET, MRS
       (Banked register), and MSR (Banked register) instructions. The ID_ISARs
       do not identify whether these instructions are implemented.
      
      UDIV/SDIV were introduced with the Virtualization extensions, even if
      not strictly related to the virtualization extensions.
      
      If ARMv7 based platform does not set ARM_CORTEX_Ax=yes, platform
      shall define ARMV7_SUPPORTS_VIRTUALIZATION to enable virtualization
      extension related resources.
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      64cc6e91
  6. 01 Nov, 2017 1 commit
  7. 24 Oct, 2017 1 commit
  8. 11 Sep, 2017 2 commits
    • Soby Mathew's avatar
      Implement log framework · 7f56e9a3
      Soby Mathew authored
      
      
      This patch gives users control over logging messages printed from the C
      code using the LOG macros defined in debug.h Users now have the ability
      to reduce the log_level at run time using the tf_log_set_max_level()
      function. The default prefix string can be defined by platform by
      overriding the `plat_log_get_prefix()` platform API which is also
      introduced in this patch.
      
      The new log framework results in saving of some RO data. For example,
      when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted
      in saving 384 bytes of RO data and increase of 8 bytes of RW data. The
      framework also adds about 108 bytes of code to the release build of FVP.
      
      Fixes ARM-software/tf-issues#462
      
      Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554
      Co-authored-by: default avatarEleanor Bonnici <Eleanor.bonnici@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      7f56e9a3
    • Soby Mathew's avatar
      Introduce tf_vprintf() and tf_string_print() · 2d7e8282
      Soby Mathew authored
      
      
      This patch introduces tf_vprintf() and tf_string_print() APIs
      which is needed by the logging framework introduced in a later
      patch.
      
      Change-Id: Ie4240443d0e04e070502b51e371e546dd469fd33
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      2d7e8282
  9. 21 Aug, 2017 1 commit
    • Julius Werner's avatar
      Fix x30 reporting for unhandled exceptions · 4d91838b
      Julius Werner authored
      
      
      Some error paths that lead to a crash dump will overwrite the value in
      the x30 register by calling functions with the no_ret macro, which
      resolves to a BL instruction. This is not very useful and not what the
      reader would expect, since a crash dump should usually show all
      registers in the state they were in when the exception happened. This
      patch replaces the offending function calls with a B instruction to
      preserve the value in x30.
      
      Change-Id: I2a3636f2943f79bab0cd911f89d070012e697c2a
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      4d91838b
  10. 14 Jun, 2017 1 commit
  11. 24 May, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Introduce `tf_snprintf` · da5241cb
      Antonio Nino Diaz authored
      
      
      This is a reduced version of `snprintf` that only supports formats '%d',
      '%i' and '%u'. It can be used when the full `snprintf` is not needed in
      order to save memory. If it finds an unknown format specifier, it
      prints an error message and panics.
      
      Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      da5241cb
  12. 15 May, 2017 1 commit
  13. 03 May, 2017 1 commit
  14. 26 Apr, 2017 1 commit
  15. 20 Apr, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Remove build option `ASM_ASSERTION` · 044bb2fa
      Antonio Nino Diaz authored
      
      
      The build option `ENABLE_ASSERTIONS` should be used instead. That way
      both C and ASM assertions can be enabled or disabled together.
      
      All occurrences of `ASM_ASSERTION` in common code and ARM platforms have
      been replaced by `ENABLE_ASSERTIONS`.
      
      ASM_ASSERTION has been removed from the user guide.
      
      Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      044bb2fa
  16. 19 Apr, 2017 2 commits
    • Dan Handley's avatar
      Minor refactor of BL2 image load v2 · c2a9ee63
      Dan Handley authored
      
      
      Previously, get_next_bl_params_from_mem_params_desc() populated arg0
      in the EL3 runtime entrypoint with a bl_params_t pointer. This is the
      responsibility of the generic LOAD_IMAGE_V2 framework instead of the
      descriptor-based image loading utility functions. Therefore this patch
      moves that code to bl2_load_images().
      
      Also, this patch moves the code that flushes the bl_params structure to
      flush_bl_params_desc(), together with the other descriptor-based image
      loading flushing code.
      
      Change-Id: I4541e3f50e3878dde7cf89e9e8f31fe0b173fb9d
      Signed-off-by: default avatarDan Handley <dan.handley@arm.com>
      c2a9ee63
    • Antonio Nino Diaz's avatar
      Add `ENABLE_ASSERTIONS` build option · cc8b5632
      Antonio Nino Diaz authored
      
      
      Add the new build option `ENABLE_ASSERTIONS` that controls whether or
      not assert functions are compiled out. It defaults to 1 for debug builds
      and to 0 for release builds.
      
      Additionally, a following patch will be done to allow this build option
      to hide auxiliary code used for the checks done in an `assert()`. This
      code is is currently under the DEBUG build flag.
      
      Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO,
      which is the default for debug builds.
      
      This patch also updates the User Guide.
      
      Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      cc8b5632
  17. 31 Mar, 2017 2 commits
  18. 08 Mar, 2017 1 commit
  19. 06 Feb, 2017 1 commit
    • Douglas Raillard's avatar
      Introduce unified API to zero memory · 308d359b
      Douglas Raillard authored
      
      
      Introduce zeromem_dczva function on AArch64 that can handle unaligned
      addresses and make use of DC ZVA instruction to zero a whole block at a
      time. This zeroing takes place directly in the cache to speed it up
      without doing external memory access.
      
      Remove the zeromem16 function on AArch64 and replace it with an alias to
      zeromem. This zeromem16 function is now deprecated.
      
      Remove the 16-bytes alignment constraint on __BSS_START__ in
      firmware-design.md as it is now not mandatory anymore (it used to comply
      with zeromem16 requirements).
      
      Change the 16-bytes alignment constraints in SP min's linker script to a
      8-bytes alignment constraint as the AArch32 zeromem implementation is now
      more efficient on 8-bytes aligned addresses.
      
      Introduce zero_normalmem and zeromem helpers in platform agnostic header
      that are implemented this way:
      * AArch32:
      	* zero_normalmem: zero using usual data access
      	* zeromem: alias for zero_normalmem
      * AArch64:
      	* zero_normalmem: zero normal memory  using DC ZVA instruction
      	                  (needs MMU enabled)
      	* zeromem: zero using usual data access
      
      Usage guidelines: in most cases, zero_normalmem should be preferred.
      
      There are 2 scenarios where zeromem (or memset) must be used instead:
      * Code that must run with MMU disabled (which means all memory is
        considered device memory for data accesses).
      * Code that fills device memory with null bytes.
      
      Optionally, the following rule can be applied if performance is
      important:
      * Code zeroing small areas (few bytes) that are not secrets should use
        memset to take advantage of compiler optimizations.
      
        Note: Code zeroing security-related critical information should use
        zero_normalmem/zeromem instead of memset to avoid removal by
        compilers' optimizations in some cases or misbehaving versions of GCC.
      
      Fixes ARM-software/tf-issues#408
      
      Change-Id: Iafd9663fc1070413c3e1904e54091cf60effaa82
      Signed-off-by: default avatarDouglas Raillard <douglas.raillard@arm.com>
      308d359b
  20. 20 Dec, 2016 1 commit
  21. 19 Dec, 2016 1 commit
  22. 05 Dec, 2016 1 commit
    • Jeenu Viswambharan's avatar
      Define and use no_ret macro where no return is expected · a806dad5
      Jeenu Viswambharan authored
      
      
      There are many instances in ARM Trusted Firmware where control is
      transferred to functions from which return isn't expected. Such jumps
      are made using 'bl' instruction to provide the callee with the location
      from which it was jumped to. Additionally, debuggers infer the caller by
      examining where 'lr' register points to. If a 'bl' of the nature
      described above falls at the end of an assembly function, 'lr' will be
      left pointing to a location outside of the function range. This misleads
      the debugger back trace.
      
      This patch defines a 'no_ret' macro to be used when jumping to functions
      from which return isn't expected. The macro ensures to use 'bl'
      instruction for the jump, and also, for debug builds, places a 'nop'
      instruction immediately thereafter (unless instructed otherwise) so as
      to leave 'lr' pointing within the function range.
      
      Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0
      Co-authored-by: default avatarDouglas Raillard <douglas.raillard@arm.com>
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      a806dad5
  23. 29 Nov, 2016 1 commit
  24. 21 Sep, 2016 1 commit
    • Yatharth Kochar's avatar
      AArch32: Common changes needed for BL1/BL2 · 1a0a3f06
      Yatharth Kochar authored
      This patch adds common changes to support AArch32 state in
      BL1 and BL2. Following are the changes:
      
      * Added functions for disabling MMU from Secure state.
      * Added AArch32 specific SMC function.
      * Added semihosting support.
      * Added reporting of unhandled exceptions.
      * Added uniprocessor stack support.
      * Added `el3_entrypoint_common` macro that can be
        shared by BL1 and BL32 (SP_MIN) BL stages. The
        `el3_entrypoint_common` is similar to the AArch64
        counterpart with the main difference in the assembly
        instructions and the registers that are relevant to
        AArch32 execution state.
      * Enabled `LOAD_IMAGE_V2` flag in Makefile for
        `ARCH=aarch32` and added check to make sure that
        platform has not overridden to disable it.
      
      Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
      1a0a3f06
  25. 20 Sep, 2016 1 commit
    • Yatharth Kochar's avatar
      Add new version of image loading. · 72600226
      Yatharth Kochar authored
      This patch adds capability to load BL images based on image
      descriptors instead of hard coded way of loading BL images.
      This framework is designed such that it can be readily adapted
      by any BL stage that needs to load images.
      
      In order to provide the above capability the following new
      platform functions are introduced:
      
        bl_load_info_t *plat_get_bl_image_load_info(void);
          This function returns pointer to the list of images that the
          platform has populated to load.
      
        bl_params_t *plat_get_next_bl_params(void);
          This function returns a pointer to the shared memory that the
          platform has kept aside to pass trusted firmware related
          information that next BL image needs.
      
        void plat_flush_next_bl_params(void);
          This function flushes to main memory all the params that
          are passed to next image.
      
        int bl2_plat_handle_post_image_load(unsigned int image_id)
          This function can be used by the platforms to update/use
          image information for given `image_id`.
      
      `desc_image_load.c` contains utility functions which can be used
      by the platforms to generate, load and executable, image list
      based on the registered image descriptors.
      
      This patch also adds new version of `load_image/load_auth_image`
      functions in-order to achieve the above capability.
      
      Following are the changes for the new version as compared to old:
        - Refactor the signature and only keep image_id and image_info_t
          arguments. Removed image_base argument as it is already passed
          through image_info_t. Given that the BL image base addresses and
          limit/size are already provided by the platforms, the meminfo_t
          and entry_point_info arguments are not needed to provide/reserve
          the extent of free memory for the given BL image.
      
        - Added check for the image size against the defined max size.
          This is needed because the image size could come from an
          unauthenticated source (e.g. the FIP header).
          To make this check, new member is added to the image_info_t
          struct for identifying the image maximum size.
      
      New flag `LOAD_IMAGE_V2` is added in the Makefile.
      Default value is 0.
      
      NOTE: `TRUSTED_BOARD_BOOT` is currently not supported when
            `LOAD_IMAGE_V2` is enabled.
      
      Change-Id: Ia7b643f4817a170d5a2fbf479b9bc12e63112e79
      72600226
  26. 31 Aug, 2016 1 commit
  27. 22 Aug, 2016 1 commit
    • Yatharth Kochar's avatar
      Remove looping around `plat_report_exception` · 5bbc451e
      Yatharth Kochar authored
      This patch removes the tight loop that calls `plat_report_exception`
      in unhandled exceptions in AArch64 state.
      The new behaviour is to call the `plat_report_exception` only
      once followed by call to `plat_panic_handler`.
      This allows platforms to take platform-specific action when
      there is an unhandled exception, instead of always spinning
      in a tight loop.
      
      Note: This is a subtle break in behaviour for platforms that
            expect `plat_report_exception` to be continuously executed
            when there is an unhandled exception.
      
      Change-Id: Ie2453804b9b7caf9b010ee73e1a90eeb8384e4e8
      5bbc451e
  28. 17 Aug, 2016 1 commit
    • Dan Handley's avatar
      Remove dcache invalidation after image authentication · ad4494dc
      Dan Handley authored
      At the end of successful image authentication in load_auth_image(),
      the data cache for the virtual address range corresponding to the
      image is invalidated (by a call to inv_dcache_range()). The intent
      seems to be to ensure the data caches do not contain any sensitive
      data used during authentication, which subsequent code can read.
      However, this same address range is already flushed (cleaned and
      invalidated by a call to flush_dcache_range()) at the end of
      load_image(), and the subsequent invalidate has no functional
      effect.
      
      This patch removes the redundant call to inv_dcache_range(). It
      also moves the flush_dcache_range() call from the end of load_image()
      to the end of load_auth_image(), so the image data will remain in
      the caches during authentication, improving performance.
      
      This also improves the comments that explain the rationale for
      calling flush_dcache_range() after image loading/authentication.
      
      Change-Id: I14f17ad2935075ef6f3d1327361c5088bfb2d284
      ad4494dc
  29. 10 Aug, 2016 3 commits
    • Soby Mathew's avatar
      AArch32: Add API to invoke runtime service handler · 1ae0a49a
      Soby Mathew authored
      This patch adds an API in runtime service framework to
      invoke the registered handler corresponding to the SMC function
      identifier. This is helpful for AArch32 because the number of
      arguments required by the handler is more than registers
      available as per AArch32 program calling conventions and
      requires the use of stack. Hence this new API will do the
      necessary argument setup and invoke the appropriate
      handler. Although this API is primarily intended for AArch32,
      it can be used for AArch64 as well.
      
      Change-Id: Iefa15947fe5a1df55b0859886e677446a0fd7241
      1ae0a49a
    • Soby Mathew's avatar
      AArch32: Add tf_printf support · bc202b44
      Soby Mathew authored
      The tf_printf library uses 64 bit division to print numbers
      in appropriate formats but AArch32 mode cannot do 64 bit division
      natively. Hence this patch adds additional number printing routines
      to handle AArch32 mode in tf_printf library. The decimal format
      printing capability is limited to 32 bit integers whereas 64 bits
      are supported in hexadecimal format. The library assumes that
      secure world is running in Little-Endian mode to do bit
      manipulations on 64 bit. Suitable assertions are present to
      enforce this assumption.
      
      Change-Id: I55a21e448cef4915d1834d76e48a84ccf0bec36d
      bc202b44
    • Soby Mathew's avatar
      AArch32: Add assembly helpers · f24307de
      Soby Mathew authored
      This patch adds various assembly helpers for AArch32 like :
      
      * cache management : Functions to flush, invalidate and clean
      cache by MVA. Also helpers to do cache operations by set-way
      are also added.
      
      * stack management: Macros to declare stack and get the current
      stack corresponding to current CPU.
      
      * Misc: Macros to access co processor registers in AArch32,
      macros to define functions in assembly, assert macros, generic
      `do_panic()` implementation and function to zero block of memory.
      
      Change-Id: I7b78ca3f922c0eda39beb9786b7150e9193425be
      f24307de
  30. 26 Jul, 2016 1 commit
    • Soby Mathew's avatar
      Improve debug assertion for runtime svc number · 5e5e4162
      Soby Mathew authored
      This patch improves the debug assertion for runtime svc number
       - Remove useless comparison ensuring that the number of descriptors
         is a positive number. The variable is an unsigned integer so can't
         be negative.
       - Check that the end address of the descriptors is sane relative
         to the start address.
      
      Change-Id: Iea7be6b34e33b8b1cbd394eb923cc834ea964831
      5e5e4162
  31. 25 Jul, 2016 3 commits
    • Sandrine Bailleux's avatar
      Ensure addresses in is_mem_free() don't overflow · 7b6d330c
      Sandrine Bailleux authored
      This patch adds some runtime checks to prevent some potential
      pointer overflow issues in the is_mem_free() function. The overflow
      could happen in the case where the end addresses, computed as the
      sum of a base address and a size, results in a value large enough
      to wrap around. This, in turn, could lead to unpredictable behaviour.
      
      If such an overflow is detected, the is_mem_free() function will now
      declare the memory region as not free. The overflow is detected using
      a new macro, called check_uptr_overflow().
      
      This patch also modifies all other places in the 'bl_common.c' file
      where an end address was computed as the sum of a base address and a
      size and instead keeps the two values separate. This avoids the need
      to handle pointer overflows everywhere. The code doesn't actually need
      to compute any end address before the is_mem_free() function is called
      other than to print information message to the serial output.
      
      This patch also introduces 2 slight changes to the reserve_mem()
      function:
      
       - It fixes the end addresses passed to choose_mem_pos(). It was
         incorrectly passing (base + size) instead of (base + size - 1).
      
       - When the requested allocation size is 0, the function now exits
         straight away and says so using a warning message.
         Previously, it used to actually reserve some memory. A zero-byte
         allocation was not considered as a special case so the function
         was using the same top/bottom allocation mechanism as for any
         other allocation. As a result, the smallest area of memory starting
         from the requested base address within the free region was
         reserved.
      
      Change-Id: I0e695f961e24e56ffe000718014e0496dc6e1ec6
      7b6d330c
    • Sandrine Bailleux's avatar
      Make runtime_svc_init() function more robust · 3a26a28c
      Sandrine Bailleux authored
       - Added some debug assertions checking that the runtime services
         indexes computed by get_unique_oen() are sane.
      
       - Do not print the name of the service when its descriptor is
         invalid. If the descriptor is corrupted then its name field
         could be corrupted as well and we would end up reading an
         arbitrary amount of invalid memory.
      
      Change-Id: I16f61065277d01fe1555d5a9cf743f7b52ccaa60
      3a26a28c
    • Sandrine Bailleux's avatar
      Improvements to runtime service init code · 9d24d353
      Sandrine Bailleux authored
      Light refactoring of the code in runtime_svc.c file.
      
       - Declare validate_rt_svc_desc()'s argument as const.
      
       - Remove 'goto' path in runtime_svc_init(). It was used in one
         place only.
      
       - Improve code readability by declaring a local variable holding the
         service pointer.
      
      Change-Id: I3b15c5adb9f37b786b5b993a9be70ea9dd017a83
      9d24d353