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  1. 18 Jan, 2019 5 commits
    • Anthony Zhou's avatar
      Tegra: fix defects flagged by MISRA Rule 10.3 · aa64c5fb
      Anthony Zhou authored 
      

MISRA Rule 10.3, the value of an expression shall not be assigned to
an object with a narrower essential type or of a different essential
type category.

The essential type of a enum member is anonymous enum, the enum member
should be casted to the right type when using it.

Both UL and ULL suffix equal to uint64_t constant in compiler
aarch64-linux-gnu-gcc, to avoid confusing, only keep U and ULL suffix
in platform code. So in some case, cast a constant to uint32_t is
necessary.

Change-Id: I1aae8cba81ef47481736e7f95f53570de7013187
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      aa64c5fb
    • Steven Kao's avatar
      Tegra: smmu: add a hook to get number of devices · bc5a86f7
      Steven Kao authored 
      

This patch adds a hook to get the number of smmu devices and
removes the NUM_SMMU_DEVICES macro.

Change-Id: Ia8dba7e9304224976b5da688b9e4b5438f11cc41
Signed-off-by: default avatarSteven Kao <skao@nvidia.com>
      bc5a86f7
    • Anthony Zhou's avatar
      Tegra: common: fix defects flagged by MISRA scan · 4c994002
      Anthony Zhou authored 
      

Macro assert(e) request 'e' is a bool type, if useing other
type, MISRA report a "The Essential Type Model" violation,
Add a judgement to fix the defects, if 'e' is not bool type.

Remove unused code [Rule 2.5]
Fix the essential type model violation [Rule 10.6, 10.7]
Use local parameter to raplace function parameter [Rule 17.8]

Change-Id: Ifce932addbb0a4b063ef6b38349d886c051d81c0
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      4c994002
    • Anthony Zhou's avatar
      Tegra: common: drivers: fix MISRA defects · 61beb3e0
      Anthony Zhou authored 
      

Main fixes:

Add suffix U for constant [Rule 10.1]

Match the operands type [Rule 10.4]

Use UL replace U for that constant define that need do "~"
operation [Rule 12.4]

Voided non c-library functions whose return types are not used
 [Rule 17.7]

Change-Id: Ia1e814ca3890eab7904be9c79030502408f30936
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      61beb3e0
    • Varun Wadekar's avatar
      Tegra: gpcdma: driver for general purpose DMA · 647d4a03
      Varun Wadekar authored 
      

This patch adds the driver for the general purpose DMA hardware
block on newer Tegra SoCs. The GPCDMA is a special purpose DMA
used to speed up memory copy operations to/from DRAM and TZSRAM.

This patch introduces a macro 'USE_GPC_DMA' to allow platforms
to override CPU based memory operations.

Change-Id: I3170d409c83b77e785437b1002a8d70188fabbeb
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      647d4a03
  3. 16 Jan, 2019 3 commits
  5. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored 
      Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca339

 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  7. 22 Aug, 2018 1 commit
  9. 14 Jul, 2017 1 commit
  11. 15 Jun, 2017 3 commits
  13. 03 May, 2017 1 commit
  15. 01 May, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra: memctrl_v2: zero out NS Video memory carveout region · 9d42d23a
      Varun Wadekar authored 
      

The video memory carveout has to be re-sized depending on the Video
content. This requires the NS world to send us new base/size values.
Before setting up the new region, we must zero out the previous memory
region, so that the video frames are not leaked to the outside world.

This patch adds the logic to zero out the previous memory carveout
region.

Change-Id: I471167ef7747154440df5c1a5e015fbeb69d9043
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      9d42d23a
  17. 26 Apr, 2017 1 commit
  19. 21 Apr, 2017 1 commit
  21. 19 Apr, 2017 1 commit
  23. 13 Apr, 2017 5 commits
  25. 10 Apr, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra: memctrl_v1: enable 'xlat_table_v2' library · c05a2197
      Varun Wadekar authored 
      

This patch enables the 'xlat_table_v2' library for the Tegra Memory
Controller driver. This library allows us to dynamically map/unmap
memory regions, with MMU enabled.

The Memory Controller driver maps/unmaps non-overlapping Video Memory
region, to clean it of any secure contents, before it resizes the
region.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      c05a2197
  27. 07 Apr, 2017 5 commits
  29. 05 Apr, 2017 4 commits
  31. 30 Mar, 2017 2 commits
  33. 27 Mar, 2017 1 commit
  35. 23 Mar, 2017 3 commits