1. 23 Jan, 2020 3 commits
  2. 22 Jan, 2020 8 commits
    • Mark Dykes's avatar
    • Mark Dykes's avatar
    • Sandrine Bailleux's avatar
    • Soby Mathew's avatar
      Merge changes from topic "add-versal-soc-support" into integration · f44d291f
      Soby Mathew authored
      * changes:
        plat: xilinx: Move pm_client.h to common directory
        plat: xilinx: versal: Make silicon default build target
        xilinx: versal: Wire silicon default setup
        versal: Increase OCM memory size for DEBUG builds
        plat: xilinx: versal: Dont set IOU switch clock
        arm64: versal: Adjust cpu clock for versal virtual
        xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI call
        plat: versal: Add Get_ChipID API
        plat: xilinx: versal: Add load Pdi API support
        xilinx: versal: Add feature check API
        xilinx: versal: Implement set wakeup source for client
        plat: xilinx: versal: Add GET_CALLBACK_DATA function
        xilinx: versal: Add PSCI APIs for system shutdown & reset
        xilinx: versal: Add PSCI APIs for suspend/resume
        xilinx: versal: Remove no_pmc ops to ON power domain
        xilinx: versal: Add set wakeup source API
        xilinx: versal: Add client wakeup API
        xilinx: versal: Add query data API
        xilinx: versal: Add request wakeup API
        xilinx: versal: Add PM_INIT_FINALIZE API for versal
        xilinx: versal: Add support of PM_GET_TRUSTZONE_VERSION API
        xilinx: versal: enable ipi mailbox service
        xilinx: move ipi mailbox svc to xilinx common
        plat: xilinx: versal: Implement PM IOCTL API
        xilinx: versal: Implement power down/restart related EEMI API
        xilinx: versal: Add SMC handler for EEMI API
        xilinx: versal: Implement PLL related PM APIs
        xilinx: versal: Implement clock related PM APIs
        xilinx: versal: Implement pin control related PM APIs
        xilinx: versal: Implement reset related PM APIs
        xilinx: versal: Implement device related PM APIs
        xilinx: versal: Add support for suspend related APIs
        xilinx: versal: Add get_api_version support
        xilinx: Add support to send PM API to PMC using IPI for versal
        plat: xilinx: versal: Move versal_def.h to include directory
        plat: xilinx: versal: Move versal_private.h to include directory
        plat: xilinx: zynqmp: Use GIC framework for warm restart
      f44d291f
    • Sandrine Bailleux's avatar
    • Andre Przywara's avatar
      FDT helper functions: Fix MISRA issues · feb358b6
      Andre Przywara authored
      
      
      Moving the FDT helper functions to the common/ directory exposed the file
      to MISRA checking, which is mandatory for common code.
      
      Fix the complaints that the test suite reported.
      
      Change-Id: Ica8c8a95218bba5a3fd92a55407de24df58e8476
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      feb358b6
    • Madhukar Pappireddy's avatar
      plat/arm: Add support for SEPARATE_NOBITS_REGION · d433bbdd
      Madhukar Pappireddy authored
      
      
      In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
      BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
      the build to require that ARM_BL31_IN_DRAM is enabled as well.
      
      Naturally with SEPARATE_NOBITS_REGION enabled, the BL31 initialization code
      cannot be reclaimed to be used for runtime data such as secondary cpu stacks.
      
      Memory map for BL31 NOBITS region also has to be created.
      
      Change-Id: Ibd480f82c1dc74e9cbb54eec07d7a8fecbf25433
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      d433bbdd
    • Madhukar Pappireddy's avatar
      Changes necessary to support SEPARATE_NOBITS_REGION feature · 76d84cbc
      Madhukar Pappireddy authored
      
      
      Since BL31 PROGBITS and BL31 NOBITS sections are going to be
      in non-adjacent memory regions, potentially far from each other,
      some fixes are needed to support it completely.
      
      1. adr instruction only allows computing the effective address
      of a location only within 1MB range of the PC. However, adrp
      instruction together with an add permits position independent
      address of any location with 4GB range of PC.
      
      2. Since BL31 _RW_END_ marks the end of BL31 image, care must be
      taken that it is aligned to page size since we map this memory
      region in BL31 using xlat_v2 lib utils which mandate alignment of
      image size to page granularity.
      
      Change-Id: Ic745c5a130fe4239fa2742142d083b2bdc4e8b85
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      76d84cbc
  3. 21 Jan, 2020 5 commits
  4. 20 Jan, 2020 24 commits