1. 12 Jul, 2019 1 commit
  2. 29 Jan, 2019 1 commit
    • Anson Huang's avatar
      imx: power optimization for i.mx8qm · 3a2b5199
      Anson Huang authored
      
      
      Current implementation of i.MX8QM power management related
      features does NOT optimize power number, all system resources
      like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
      ON) when system suspend or CPU hotplug.
      
      To lower the power number, OFF mode should be adopted for those
      system resources whenever they can be OFF, A cluster will be OFF
      if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
      if system suspend, IRQ steer can be OFF if the wakeup source is
      belonged to system controller partition, so wakeup source runtime
      check is used to determine if IRQ steer can be OFF before system
      suspend.
      
      If resources are powered off for suspend, they should be restored
      properly after system resume.
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      3a2b5199
  3. 18 Jan, 2019 1 commit
    • Anson Huang's avatar
      imx: support for i.MX8 SoCs misc IPC · 936840f1
      Anson Huang authored
      
      
      NXP's i.MX8 SoCs have system controller (M4 core) which takes
      control of misc functions like temperature alarm, dma etc., other
      Cortex-A clusters can send out command via MU (Message Unit) to
      system controller for misc operation etc..
      
      This patch adds misc IPC(inter-processor communication) support.
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      936840f1
  4. 17 Jan, 2019 1 commit
    • Anson Huang's avatar
      Support for NXP's i.MX8 SoCs timer IPC · 1552df5d
      Anson Huang authored
      
      
      NXP's i.MX8 SoCs have system controller (M4 core) which takes
      control of timer management, including watchdog, srtc and system
      counter etc., other clusters like Cortex-A35 can send out command
      via MU (Message Unit) to system controller for timer operation.
      
      This patch adds timer IPC(inter-processor communication) support.
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      1552df5d
  5. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  6. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  7. 22 Aug, 2018 1 commit
  8. 19 Jun, 2018 1 commit
    • Anson Huang's avatar
      Support for NXP's i.MX8 SoCs IPC · ff2743e5
      Anson Huang authored
      
      
      NXP's i.MX8 SoCs have system controller (M4 core)
      which takes control of clock management, power management,
      partition management, PAD management etc., other
      clusters like Cortex-A35 can send out command via MU
      (Message Unit) to system controller for clock/power
      management etc..
      
      This patch adds basic IPC(inter-processor communication) support.
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      ff2743e5