- 04 Jan, 2019 5 commits
-
-
Jolly Shah authored
When linux calls pm_ioctl_get_pll_frac_mode() it doesn't expect the actual mode to be read from hardware, but the value that it is intending to program. Therefore, we return the buffered value to linux. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Jolly Shah authored
When linux calls pm_ioctl_set_pll_frac_mode() it doesn't expect the fractional mode to be changed in hardware. Furthermore, even before this patch setting the mode which is done by writing into register takes no effect until the PLL reset is deasserted, i.e. until linux "enables" the PLL. To adjust the code to system-level PLL EEMI API and avoid unnecessary IPIs that would otherwise be issued, we buffer the mode value set via IOCTL until the PLL mode really needs to be set. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Jolly Shah authored
Fractional data should be set using PLL set parameter EEMI API. This stands for system-level communication (APU to PMU). Since linux already uses a specific IOCTL function to do this and we need to keep it that way, the pll clock ID given by linux has to be mapped to the pll node ID that is communicated at the system-level (argument of PLL set parameter API). With this modification the function pm_api_clk_set_pll_frac_data is removed from pm_api_clock.c/h because it became unused. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Jolly Shah authored
Fractional data should be get using PLL get parameter EEMI API. This stands for system-level communication (APU to PMU). Since linux already uses a specific IOCTL function to do this and we need to keep it that way, the pll clock ID given by linux has to be mapped to the pll node ID that is communicated at the system-level (argument of PLL get parameter API). With this modification the function pm_api_clk_get_pll_frac_data is removed from pm_api_clock.c/h because it became unused. The clock enum is defined as 'enum clock_id'. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
- 21 Sep, 2018 1 commit
-
-
Daniel Boulby authored
Ensure case clauses: * Terminate with an unconditional break, return or goto statement. * Use conditional break, return or goto statements as long as the end of the case clause is unreachable; such case clauses must terminate with assert(0) /* Unreachable */ or an unconditional __dead2 function call * Only fallthough when doing otherwise would result in less readable/maintainable code; such case clauses must terminate with a /* Fallthrough */ comment to make it clear this is the case and indicate that a fallthrough is intended. This reduces the chance of bugs appearing due to unintended flow through a switch statement Change-Id: I70fc2d1f4fd679042397dec12fd1982976646168 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
-
- 04 Sep, 2018 3 commits
-
-
Siva Durga Prasad Paladugu authored
Add support for writing to AFI registers. So that after writing a bitstream the interface can be programmed. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
-
Siva Durga Prasad Paladugu authored
Since the MMIO read/write APIs are removed from Linux user space, Linux cannot directly write to the Global General Storage Register 4 any more to set healthy boot status. Create an IOCTL to allow Linux to set boot health status. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: Will Wong <willw@xilinx.com>
-
Siva Durga Prasad Paladugu authored
To make ULPI transceiver work, a HIGH - LOW - HIGH pulse needs to be given to resetb pin of ULPI chip. In ZYNQMP, this resetb pin is being driven by BOOT MODE PIN 1. The BOOT MODE PIN's are controlled by BOOT_PIN_CTRL register present in CRL_APB address region. Since CRL_APB can be resticted to secure access, this pin should be controlled by ATF. This patch adds the support for the same. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
-
- 15 Mar, 2018 5 commits
-
-
Jolly Shah authored
Various changes to comply with MISRA static analysis rules Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Rajan Vaja authored
Add IOCTLs to read/write global general storage and persistent global general storage registers access. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Rajan Vaja authored
These are empty functions with no logic right now. Code will be added in subsequent commits. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Rajan Vaja authored
Implement ioctl APIs which uses MMIO operations to configure devices. Below IOCTLs are supported in this patch: * Set tap delay bypass * Set SGMII mode * SD reset * Set SD/MMC tap delay Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-
Rajan Vaja authored
Implement ioctl APIs which uses MMIO operations to control RPU operations. Below IOCTLs are supported in this patch: * Get RPU operation mode * Set RPU operation mode * Configure RPU boot address (OCM/TCM) * Configure TCM combined mode Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
-