1. 07 Feb, 2019 1 commit
  2. 23 Jan, 2019 3 commits
  3. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  4. 15 Aug, 2017 1 commit
    • Julius Werner's avatar
      Add new alignment parameter to func assembler macro · 64726e6d
      Julius Werner authored
      
      
      Assembler programmers are used to being able to define functions with a
      specific aligment with a pattern like this:
      
          .align X
        myfunction:
      
      However, this pattern is subtly broken when instead of a direct label
      like 'myfunction:', you use the 'func myfunction' macro that's standard
      in Trusted Firmware. Since the func macro declares a new section for the
      function, the .align directive written above it actually applies to the
      *previous* section in the assembly file, and the function it was
      supposed to apply to is linked with default alignment.
      
      An extreme case can be seen in Rockchip's plat_helpers.S which contains
      this code:
      
        [...]
        endfunc plat_crash_console_putc
      
        .align 16
        func platform_cpu_warmboot
        [...]
      
      This assembles into the following plat_helpers.o:
      
        Sections:
        Idx Name                             Size  [...]  Algn
         9 .text.plat_crash_console_putc 00010000  [...]  2**16
        10 .text.platform_cpu_warmboot   00000080  [...]  2**3
      
      As can be seen, the *previous* function actually got the alignment
      constraint, and it is also 64KB big even though it contains only two
      instructions, because the .align directive at the end of its section
      forces the assembler to insert a giant sled of NOPs. The function we
      actually wanted to align has the default constraint. This code only
      works at all because the linker just happens to put the two functions
      right behind each other when linking the final image, and since the end
      of plat_crash_console_putc is aligned the start of platform_cpu_warmboot
      will also be. But it still wastes almost 64KB of image space
      unnecessarily, and it will break under certain circumstances (e.g. if
      the plat_crash_console_putc function becomes unused and its section gets
      garbage-collected out).
      
      There's no real way to fix this with the existing func macro. Code like
      
       func myfunc
       .align X
      
      happens to do the right thing, but is still not really correct code
      (because the function label is inserted before the .align directive, so
      the assembler is technically allowed to insert padding at the beginning
      of the function which would then get executed as instructions if the
      function was called). Therefore, this patch adds a new parameter with a
      default value to the func macro that allows overriding its alignment.
      
      Also fix up all existing instances of this dangerous antipattern.
      
      Change-Id: I5696a07e2fde896f21e0e83644c95b7b6ac79a10
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      64726e6d
  5. 03 May, 2017 1 commit
  6. 21 Apr, 2017 1 commit
  7. 05 Apr, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra186: trampoline: update "System Suspend" exit criteria · 25621454
      Varun Wadekar authored
      
      
      The TZRAM memory loses its state during "System Suspend". This patch
      check if TZRAM base address contains valid data, to decide if the system
      is exiting from "System Suspend". To enable TZDRAM encryption, the Memory
      Controller's TZDRAM base/size registers would be populated by the BPMP
      when the system "wakes up".
      
      Change-Id: I5fc8ba1ae3bce12f0ece493f6f9f5f4d92a46344
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      25621454
  8. 27 Mar, 2017 1 commit
  9. 23 Mar, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra186: save/restore BL31 context to/from TZDRAM · 68c7de6f
      Varun Wadekar authored
      
      
      This patch adds support to save the BL31 state to the TZDRAM
      before entering system suspend. The TZRAM loses state during
      system suspend and so we need to copy the entire BL31 code to
      TZDRAM before entering the state.
      
      In order to restore the state on exiting system suspend, a new
      CPU reset handler is implemented which gets copied to TZDRAM
      during boot. TO keep things simple we use this same reset handler
      for booting secondary CPUs too.
      
      Change-Id: I770f799c255d22279b5cdb9b4d587d3a4c54fad7
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      68c7de6f