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For the existing SoCs we support, we use SEPARATE_NOBITS_REGION, to move
some parts of the data into separate memory regions (to save on the SRAM
A2 we are loaded into).
For the upcoming H616 platform this is of no concern (we run in DRAM),
so make this flag a platform choice instead.

Change-Id: Ic01d49578c6274660f8f112bd23680d3eca3be7a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

RSB is faster and more efficient, and it has a simpler driver. As long
as the PMIC is returned to I2C mode after use, the rich OS can later use
either bus.

Change-Id: I0c5f32e88a090c8c5cccb81bd24596b301ab9da7
Signed-off-by: Samuel Holland <samuel@sholland.org>

Chip ID checking and poweroff work just like they did before.
Regulators are now enabled just like on A64/H5.

This changes the signatures of the low-level register read/write
functions to match the interface expected by the common driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I14d63d171a094fa1375904928270fa3e21761646

These are used by the PMIC setup code, which runs during BL31
initialization, and the PSCI shutdown code, also a part of BL31.
They can't be needed before BL31, or it wouldn't be possible to boot.
Allwinner platforms don't generally build anything but BL31 anyway, but
this change improves clarity and consistency with allwinner-common.mk.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I24f1d9ca8b4256e44badf5218d04d8690082babf

For the two different platforms we support in the Allwinner port we
mostly rely on header files covering the differences. This leads to the
platform.mk files in the respective directories to be almost identical.

To avoid further divergence and make sure that one platform doesn't
break accidentally, let's create a shared allwinner-common.mk file and
include that from the platform directory.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Change-Id: I206478597dd9855d3fe1577e7e2c0fe6d2af1cc5
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

At the moment we have two I2C stub drivers (for the Allwinner and the
Marvell platform), which #include the actual .c driver file.
Change this into the more usual design, by renaming and moving the stub
drivers into platform specific header files and including these from the
actual driver file. The platform specific include directories make sure
the driver picks up the right header automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

The OTT reference design of Allwinner H6 SoC uses an X-Powers AXP805
PMIC.

Add initial code for it.

Currently it's only detected.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

As the ATF may need to do some power initialization on Allwinner
platform with AXP PMICs, call the PMIC setup code in BL31.

Stub of PMIC setup code is added, to prevent undefined reference.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

The H6 is Allwinner's most recent SoC. It shares most peripherals with the
other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory
map.

Introduce a separate platform target, which includes a different header
file to cater for the address differences. Also add the new build target
to the documentation.

The new ATF platform name is "sun50i_h6".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Some peripherals are TrustZone aware, so they need to be configured to
be accessible from non-secure world, as we don't need any of them being
exclusive to the secure world.
This affects some clocks, DMA channels and the Secure Peripheral
Controller (SPC). The latter controls access to most devices, but is not
active unless booting with the secure boot fuse burnt.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

sun50i_cpu_on will be used by the PSCI implementation to initialize
secondary cores for SMP. Unfortunately, sun50i_cpu_off is not usable by
PSCI directly, because it is not possible for a CPU to use this function
to power itself down. Power cannot be shut off until the outputs are
clamped, and MMIO does not work once the outputs are clamped.

But at least CPU0 can shutdown the other cores early in the BL31 boot
process and before shutting down the system.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

The Allwinner A64 SoC is quite popular on single board computers.
It comes with four Cortex-A53 cores in a singe cluster and the usual
peripherals for set-top box/tablet SoC.

The ATF platform target is called "sun50i_a64".

[Andre: adapted to amended directory layout, removed unneeded definitions ]
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>