1. 13 Sep, 2019 1 commit
    • Alexei Fedorov's avatar
      Refactor ARMv8.3 Pointer Authentication support code · ed108b56
      Alexei Fedorov authored
      
      
      This patch provides the following features and makes modifications
      listed below:
      - Individual APIAKey key generation for each CPU.
      - New key generation on every BL31 warm boot and TSP CPU On event.
      - Per-CPU storage of APIAKey added in percpu_data[]
        of cpu_data structure.
      - `plat_init_apiakey()` function replaced with `plat_init_apkey()`
        which returns 128-bit value and uses Generic timer physical counter
        value to increase the randomness of the generated key.
        The new function can be used for generation of all ARMv8.3-PAuth keys
      - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
      - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
        generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
        pauth_disable_el1()` and `pauth_disable_el3()` functions disable
        PAuth for EL1 and EL3 respectively;
        `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
        cpu-data structure.
      - Combined `save_gp_pauth_registers()` function replaces calls to
        `save_gp_registers()` and `pauth_context_save()`;
        `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
        and `restore_gp_registers()` calls.
      - `restore_gp_registers_eret()` function removed with corresponding
        code placed in `el3_exit()`.
      - Fixed the issue when `pauth_t pauth_ctx` structure allocated space
        for 12 uint64_t PAuth registers instead of 10 by removal of macro
        CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
        and assigning its value to CTX_PAUTH_REGS_END.
      - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
        in `msr	spsel`  instruction instead of hard-coded values.
      - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.
      
      Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      ed108b56
  2. 11 Sep, 2019 1 commit
    • Justin Chadwell's avatar
      Add UBSAN support and handlers · 1f461979
      Justin Chadwell authored
      
      
      This patch adds support for the Undefined Behaviour sanitizer. There are
      two types of support offered - minimalistic trapping support which
      essentially immediately crashes on undefined behaviour and full support
      with full debug messages.
      
      The full support relies on ubsan.c which has been adapted from code used
      by OPTEE.
      
      Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727
      Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      1f461979
  3. 09 Sep, 2019 1 commit
  4. 05 Sep, 2019 1 commit
  5. 04 Sep, 2019 1 commit
  6. 29 Aug, 2019 1 commit
  7. 01 Aug, 2019 1 commit
  8. 22 Jul, 2019 1 commit
    • Imre Kis's avatar
      Romlib makefile refactoring and script rewriting · d8210dc6
      Imre Kis authored
      
      
      The features of the previously existing gentbl, genvar and genwrappers
      scripts were reimplemented in the romlib_generator.py Python script.
      This resulted in more readable and maintainable code and the script
      introduces additional features that help dependency handling in
      makefiles. The assembly templates were separated from the script logic
      and were collected in the 'templates' directory.
      
      The targets and their dependencies were reorganized in the makefile and
      the dependency handling of included index files is possible now.
      Incremental build is available in case of modifying the index files.
      Signed-off-by: default avatarImre Kis <imre.kis@arm.com>
      Change-Id: I79f65fab9dc5c70d1f6fc8f57b2a3009bf842dc5
      d8210dc6
  9. 18 Jul, 2019 1 commit
  10. 17 Jul, 2019 1 commit
  11. 12 Jul, 2019 1 commit
    • Paul Beesley's avatar
      doc: Generate PlantUML diagrams automatically · 7cb68807
      Paul Beesley authored
      
      
      Currently we have some pre-rendered versions of certain diagrams
      in SVG format. These diagrams have corresponding PlantUML source
      that can be rendered automatically as part of the documentation
      build, removing the need for any intermediate files.
      
      This patch adds the Sphinx "plantuml" extension, replaces
      references to the pre-rendered SVG files within the documents,
      and finally removes the SVG files and helper script.
      
      New requirements for building the docs are the
      "sphinxcontrib-plantuml" Python module (added to the pip
      requirements.txt file) and the Graphviz package (provides the
      "dot" binary) which is in the Ubuntu package repositories.
      
      Change-Id: I24b52ee40ff79676212ed7cff350294945f1b50d
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      7cb68807
  12. 10 Jul, 2019 2 commits
  13. 09 Jul, 2019 2 commits
  14. 08 Jul, 2019 1 commit
  15. 02 Jul, 2019 9 commits
  16. 01 Jul, 2019 1 commit
  17. 24 Jun, 2019 1 commit
  18. 22 Jun, 2019 1 commit
  19. 17 Jun, 2019 1 commit
  20. 12 Jun, 2019 1 commit
  21. 10 Jun, 2019 1 commit
  22. 06 Jun, 2019 2 commits
  23. 03 Jun, 2019 1 commit
  24. 31 May, 2019 1 commit
  25. 30 May, 2019 2 commits
  26. 28 May, 2019 2 commits
  27. 24 May, 2019 1 commit
    • Alexei Fedorov's avatar
      Add support for Branch Target Identification · 9fc59639
      Alexei Fedorov authored
      
      
      This patch adds the functionality needed for platforms to provide
      Branch Target Identification (BTI) extension, introduced to AArch64
      in Armv8.5-A by adding BTI instruction used to mark valid targets
      for indirect branches. The patch sets new GP bit [50] to the stage 1
      Translation Table Block and Page entries to denote guarded EL3 code
      pages which will cause processor to trap instructions in protected
      pages trying to perform an indirect branch to any instruction other
      than BTI.
      BTI feature is selected by BRANCH_PROTECTION option which supersedes
      the previous ENABLE_PAUTH used for Armv8.3-A Pointer Authentication
      and is disabled by default. Enabling BTI requires compiler support
      and was tested with GCC versions 9.0.0, 9.0.1 and 10.0.0.
      The assembly macros and helpers are modified to accommodate the BTI
      instruction.
      This is an experimental feature.
      Note. The previous ENABLE_PAUTH build option to enable PAuth in EL3
      is now made as an internal flag and BRANCH_PROTECTION flag should be
      used instead to enable Pointer Authentication.
      Note. USE_LIBROM=1 option is currently not supported.
      
      Change-Id: Ifaf4438609b16647dc79468b70cd1f47a623362e
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      9fc59639