1. 19 Nov, 2019 1 commit
    • Justin Chadwell's avatar
      Enable -Wshadow always · b7f6525d
      Justin Chadwell authored
      
      
      Variable shadowing is, according to the C standard, permitted and valid
      behaviour. However, allowing a local variable to take the same name as a
      global one can cause confusion and can make refactoring and bug hunting
      more difficult.
      
      This patch moves -Wshadow from WARNING2 into the general warning group
      so it is always used. It also fixes all warnings that this introduces
      by simply renaming the local variable to a new name
      
      Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e
      Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      b7f6525d
  2. 29 Aug, 2019 2 commits
  3. 16 Aug, 2019 2 commits
  4. 01 Aug, 2019 1 commit
    • Julius Werner's avatar
      Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ · d5dfdeb6
      Julius Werner authored
      
      
      NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
      
      All common C compilers predefine a macro called __ASSEMBLER__ when
      preprocessing a .S file. There is no reason for TF-A to define it's own
      __ASSEMBLY__ macro for this purpose instead. To unify code with the
      export headers (which use __ASSEMBLER__ to avoid one extra dependency),
      let's deprecate __ASSEMBLY__ and switch the code base over to the
      predefined standard.
      
      Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      d5dfdeb6
  5. 12 Jul, 2019 1 commit
  6. 11 Jul, 2019 1 commit
  7. 22 Jun, 2019 1 commit
  8. 17 Jun, 2019 1 commit
  9. 13 Jun, 2019 1 commit
  10. 11 Apr, 2019 4 commits
  11. 02 Apr, 2019 3 commits
  12. 26 Mar, 2019 1 commit
  13. 04 Mar, 2019 1 commit
  14. 20 Feb, 2019 1 commit
    • Marek Vasut's avatar
      rcar_gen3: plat: Prevent PCIe hang during L1X config access · 0969397f
      Marek Vasut authored
      
      
      In case the PCIe controller receives a L1_Enter_PM DLLP, it will
      disable the internal PLLs. The system software cannot predict it
      and can attempt to perform device config space access across the
      PCIe link while the controller is in this transitional state. If
      such condition happens, the PCIe controller register access will
      trigger ARM64 SError exception.
      
      This patch adds checks for which PCIe controller is enabled,
      checks whether the PCIe controller is in such a transitional
      state and if so, first completes the transition and then restarts
      the instruction which caused the SError.
      Signed-off-by: default avatarMarek Vasut <marek.vasut+renesas@gmail.com>
      0969397f
  15. 01 Feb, 2019 1 commit
  16. 29 Jan, 2019 4 commits
  17. 08 Jan, 2019 14 commits