- 18 Jul, 2018 6 commits
-
-
Konstantin Porotchkin authored
Add i2c driver for A8K SoC family. Change-Id: I5932b2fce286d84fc3ad5a74c4c456001faa3196 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
Konstantin Porotchkin authored
Add COMPHY driver for usage in a runtime service. Change-Id: I6fb42d0a099496d5699ee24684ae2b93ed35770b Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
Konstantin Porotchkin authored
Add thermal driver for A8K SoC family. The termal unit data is used by Marvell DRAM initialization code for optimizing the memory controller configuration Change-Id: Iad92689fa6e4224a89d872e9aa015393abd9cf73 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
Konstantin Porotchkin authored
Add LLC (L3) cache management drivers for Marvell SoCs AP806, AP807 and AP810 Change-Id: Ic70710f9bc5b6b48395d62212df7011e2fbb5894 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
Konstantin Porotchkin authored
Add ModularChip and MCI drivers for A8K SoC family. ModularChip drivers include support for the internal building blocks of Marvell ARMADA SoCs - APN806, APN807 and CP110 Change-Id: I9559343788fa2e5eb47e6384a4a7d47408787c02 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
Konstantin Porotchkin authored
Add address decoding unit drivers for Marvell SoCs. Address decoding flow and address translation units chart are located at docs/marvell/misc/mvebu-a8k-addr-map.txt Change-Id: Id6ce311fa1f4f112df3adfac5d20449f495f71ed Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
-
- 18 Jun, 2018 1 commit
-
-
Jeenu Viswambharan authored
To build with the new release, we pick couple of more files from mbedTLS library. Change-Id: I77dfe5723284cb26d4e5c717fb0e6f6dd803cb6b Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
-
- 14 Jun, 2018 1 commit
-
-
Roberto Vargas authored
RFC4122 defines that fields are stored in network order (big endian), but TF-A stores them in machine order (little endian by default in TF-A). We cannot change the future UUIDs that are already generated, but we can store all the bytes using arrays and modify fiptool to generate the UUIDs with the correct byte order. Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
- 12 Jun, 2018 2 commits
-
-
Daniel Boulby authored
Use a _ prefix for Macro arguments to prevent that argument from hiding variables of the same name in the outer scope Rule 5.3: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope Fixed For: make LOG_LEVEL=50 PLAT=fvp Change-Id: I67b6b05cbad4aeca65ce52981b4679b340604708 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
-
Daniel Boulby authored
Rule 5.1: External identifiers shall be distinct Some of the identifier names in the GICv3 driver were so long that the first 31 characters were identical. This patch shortens these names to make sure they are different. Fixed for: LOG_LEVEL=50 PLAT=fvp Change-Id: Iecd551e3a015d144716b87b42c83dd3ab8c34d90 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
-
- 11 Jun, 2018 1 commit
-
-
Benjamin Fair authored
On TI platforms the UART is disabled by default and must be explicitly enabled using the MDR1 register. NOTE: The original definition of http://www.ti.com/lit/ds/symlink/pc16550d.pdf has no MDR register, but many TI SoCs implementing 16550 do have a quirky MDR register implemented. So, this should be enabled with TI_16550_MDR_QUIRK NOTE: In such implementation, the CSR register does not exist. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
-
- 18 May, 2018 1 commit
-
-
Soby Mathew authored
This patch implements support for adding dynamic configurations for BL31 (soc_fw_config), BL32 (tos_fw_config) and BL33 (nt_fw_config). The necessary cert tool support and changes to default chain of trust are made for these configs. Change-Id: I25f266277b5b5501a196d2f2f79639d838794518 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
-
- 17 May, 2018 1 commit
-
-
Daniel Boulby authored
In 'console_set_scope' and when registering a console, field 'flags' of 'console_t' is assigned a 32-bit value. However, when it is actually used, the functions perform 64-bit reads to access its value. This patch changes all 64-bit reads to 32-bit reads. Change-Id: I181349371409e60065335f078857946fa3c32dc1 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
-
- 11 May, 2018 1 commit
-
-
Antonio Nino Diaz authored
In the multi console driver, allowing to register the same console more than once may result in an infinte loop when putc is called. If, for example, a boot message is trying to be printed, but the consoles in the loop in the linked list are runtime consoles, putc will iterate forever looking for a console that can print boot messages (or a NULL pointer that will never come). This loop in the linked list can occur after restoring the system from a system suspend. The boot console is registered during the cold boot in BL31, but the runtime console is registered even in the warm boot path. Consoles are always added to the start of the linked list when they are registered, so this it what should happen if they were actually different structures: console_list -> NULL console_list -> BOOT -> NULL console_list -> RUNTIME -> BOOT -> NULL console_list -> RUNTIME -> RUNTIME -> BOOT -> NULL In practice, the two runtime consoles are the same one, so they create this loop: console_list -> RUNTIME -. X -> BOOT -> NULL ^ | `----' This patch adds an assertion to detect this problem. The assertion will fail whenever the same structure tries to be registered while being on the list. In order to assert this, console_is_registered() has been implemented. It returns 1 if the specified console is registered, 0 if not. Change-Id: I922485e743775ca9bd1af9cbd491ddd360526a6d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
- 27 Apr, 2018 1 commit
-
-
Masahiro Yamada authored
Commit 4c0d0390 ("Rework type usage in Trusted Firmware") changed the type usage in struct declarations, but did not touch the definition side. Fix the type mismatch. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-
- 13 Apr, 2018 2 commits
-
-
Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \ GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all Change-Id: Ie4cd6011b3e4fdcdd94ccb97a7e941f3b5b7aeb8 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers Fixed for: make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \ GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all Change-Id: Ia34fe1ae1f142e89c9a6c19831e3daf4d28f5831 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
- 09 Apr, 2018 1 commit
-
-
Amit Daniel Kachhap authored
Some low end platforms using DMC500 memory controller do not have CCI(Cache Coherent Interconnect) interface and only have non-coherent system interface support. Hence this patch makes the system interface count configurable from the platforms. Change-Id: I6d54c90eb72fd18026c6470c1f7fd26c59dc4b9a Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
-
- 03 Apr, 2018 2 commits
-
-
Andre Przywara authored
Accessing the interrupt_props array only happens inside a loop over interrupt_props_num, so the GICv3 driver can cope with no secure interrupts. This allows us to relax the asserts that insists on a non-NULL interrupt_props pointer and at least one secure interrupt. This enables GICv3 platforms which have no need for a secure interrupt. This only covers the non-deprecated code paths. Change-Id: I49db291906512f56af065772f69acb281dfbdcfb Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
Samuel Holland authored
Accessing the interrupt_props array only happens inside a loop over interrupt_props_num, so the GICv2 driver can cope with no secure interrupts. As in fact we have already some asserts in place that respect that, lets change the final place where we insist on a non-NULL pointer to relax that. This enables GICv2 platforms which have no need for a secure interrupt. This only covers the non-deprecated code paths. Also we remove a now redundant assert(). Change-Id: Id100ea978643d8558335ad28649d55743fe9bd4c Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
- 27 Mar, 2018 1 commit
-
-
Joel Hutton authored
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type. Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
-
- 26 Mar, 2018 2 commits
-
-
Jonathan Wright authored
Ensure (where possible) that switch statements in drivers comply with MISRA rules 16.1 - 16.7. Change-Id: I7a91e04b02af80fbc4673a52293386c0f81a0f7a Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
-
Jeenu Viswambharan authored
- Interrupt configuration is a 2-bit field, so the field shift has to be double that of the bit number. - Interrupt configuration (level- or edge-trigger) is specified in the MSB of the field, not LSB. Fixes applied to both GICv2 and GICv3 drivers. Fixes ARM-software/tf-issues#570 Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
-
- 22 Mar, 2018 1 commit
-
-
Antonio Nino Diaz authored
Replace placeholder by actual implementation. Change-Id: I0861b1ac5304b0d2d7c32d7d9a48bd985e258e92 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
- 05 Mar, 2018 1 commit
-
-
Michalis Pappas authored
Include missing plat_helpers.S into pl011_console.S, to build successfully when MULTI_CONSOLE_API is enabled. Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
-
- 01 Mar, 2018 2 commits
-
-
Dan Handley authored
Emit runtime warnings when intializing the GIC drivers using the deprecated method of defining integer interrupt arrays in the GIC driver data structures; interrupt_prop_t arrays should be used instead. This helps platforms detect that they have migration work to do. Previously, no warning was emitted in this case. This affects both the GICv2 and GICv3 drivers. Also use the __deprecated attribute to emit a build time warning if these deprecated fields are used. These warnings are suppressed in the GIC driver compatibility functions but will be visible if platforms use them. Change-Id: I6b6b8f6c3b4920c448b6dcb82fc18442cfdf6c7a Signed-off-by: Dan Handley <dan.handley@arm.com>
-
Dan Handley authored
For platforms that have not migrated to MULTI_CONSOLE_API == 1, there are a lot of confusing deprecated declaration warnings relating to use of console_init() and console_uninit(). Some of these relate to use by the generic code, not the platform code. These functions are not really deprecated but *removed* when MULTI_CONSOLE_API == 1. This patch consolidates these warnings into a single preprocessor warning. The __deprecated attribute is removed from the console_init() and console_uninit() declarations. For preprocessor warnings like this to not cause fatal build errors, this patch adds -Wno-error=cpp to the build flags when ERROR_DEPRECATED == 0. This option (and -Wno-error=deprecated-declarations) is now added to CPPFLAGS instead of TF_CFLAGS to ensure the build flags are used in the assembler as well as the compiler. This patch also disentangles the MULTI_CONSOLE_API and ERROR_DEPRECATED build flags by defaulting MULTI_CONSOLE_API to 0 instead of ERROR_DEPRECATED. This allows platforms that have not migrated to MULTI_CONSOLE_API to use ERROR_DEPRECATED == 1 to emit a more meaningful build error. Finally, this patch bans use of MULTI_CONSOLE_API == 1 and AARCH32, since the AArch32 console implementation does not support MULTI_CONSOLE_API == 1. Change-Id: If762165ddcb90c28aa7a4951aba70cb15c2b709c Signed-off-by: Dan Handley <dan.handley@arm.com>
-
- 28 Feb, 2018 3 commits
-
-
Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined. Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Change-Id: Iff384187c74a598a4e73f350a1893b60e9d16cec Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
-
- 26 Feb, 2018 1 commit
-
-
Soby Mathew authored
This patch adds image IDs to `hw_config` and `tb_fw_config` and includes them in the default Chain Of Trust (CoT). Change-Id: If7bb3e9be8a5e48be76614b35bf43d58fc7fed12 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
-
- 24 Feb, 2018 1 commit
-
-
fengbaopeng authored
Hynix ufs has deviations on hi36xx platform which will result in ufs bursts transfer failures at a very low probability. To fix the problem, the Hynix device must set the register VS_DebugSaveConfigTime to 0x10, which will set time reference for SaveConfigTime is 250 ns. The time reference for SaveConfigTime is 40 ns by default. Signed-off-by: fengbaopeng <fengbaopeng@hisilicon.com>
-
- 21 Feb, 2018 1 commit
-
-
Soby Mathew authored
Previously the definition of `_tzc_read_peripheral_id()` was wrapped in ENABLE_ASSERTIONS build flag. This causes build issue for TZC400 driver when DEBUG=1 and ENABLE_ASSERTIONS=0. This patch fixes the same by moving the definitions outside the ENABLE_ASSERTIONS build flag. Change-Id: Ic1cad69f02ce65ac34aefd39eaa96d5781043152 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
-
- 14 Feb, 2018 1 commit
-
-
Antonio Nino Diaz authored
This fixes all defects according to MISRA Rule 3.1: "The character sequences /* and // shall not be used within a comment". This affects all URLs in comments, so they have been removed: - The link in `sdei_state.c` can also be found in the documentation file `docs/sdei.rst`. - The bug that the file `io_fip.c` talks about doesn't affect the currently supported version of GCC, so it doesn't make sense to keep the comment. Note that the version of GCC officially supported is the one that comes with Linaro Release 17.10, which is GCC 6.2. - The link in `tzc400.c` was broken, and it didn't correctly direct to the Technical Reference Manual it should. The link has been replaced by the title of the document, which is more convenient when looking for the document. Change-Id: I89f60c25f635fd4c008a5d3a14028f814c147bbe Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
- 25 Jan, 2018 1 commit
-
-
Julius Werner authored
Delay functions like udelay() are often used to ensure that the necessary time passed to allow some asynchronous event to finish, such as the stabilization delay for a power rail. For these use cases it is not very problematic if the delay is slightly longer than requested, but it is critical that the delay must never be shorter. The current udelay() implementation contains two hazards that may cause the delay to be slightly shorter than intended: Firstly, the amount of ticks to wait is calculated with an integer division, which may cut off the last fraction of ticks needed. Secondly, the delay may be short by a fraction of a tick because we do not know whether the initial ("start") sample of the timer was near the start or near the end of the current tick. Thus, if the code intends to wait for one tick, it might read the timer value close to the end of the current tick and then read it again right after the start of the next tick, concluding that the duration of a full tick has passed when it in fact was just a fraction of it. This patch rounds up the division and always adds one extra tick to counteract both problems and ensure that delays will always be larger but never smaller than requested. Change-Id: Ic5fe5f858b5cdf3c0dbf3e488d4d5702d9569433 Signed-off-by: Julius Werner <jwerner@chromium.org>
-
- 24 Jan, 2018 1 commit
-
-
Derek Basehore authored
If the GIC loses power during suspend, which the restore code was written for, exit early in the post restore power sequence. This prevents an assert from tripping, and the power sequence isn't needed in this case anyways. Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
- 19 Jan, 2018 4 commits
-
-
Julius Werner authored
coreboot supports an in-memory console to store firmware logs even when no serial console is available. It is widely supported by coreboot-compatible bootloaders (including SeaBIOS and GRUB) and can be read by the Linux kernel. This patch allows BL31 to add its own log messages to this console. The driver will be registered automatically if coreboot support is compiled in and detects the presence of a console buffer in the coreboot tables. Change-Id: I31254dfa0c2fdeb7454634134b5707b4b4154907 Signed-off-by: Julius Werner <jwerner@chromium.org>
-
Julius Werner authored
This patch updates the Cadence CDNS console driver to support the new console API. The driver will continue to support the old API as well by checking the MULTI_CONSOLE_API compile-time flag. Change-Id: I2ef8fb0d6ab72696997db1e0243a533499569d6b Signed-off-by: Julius Werner <jwerner@chromium.org>
-
Julius Werner authored
This patch updates the ARM PL011 console driver to support the new console API. The driver will continue to support the old API as well by checking the MULTI_CONSOLE_API compile-time flag. Change-Id: Ic34e4158addbb0c5fae500c9cff899c05a4f4206 Signed-off-by: Julius Werner <jwerner@chromium.org>
-
Julius Werner authored
This patch updates the TI 16550 console driver to support the new console API. The driver will continue to support the old API as well by checking the MULTI_CONSOLE_API compile-time flag. Change-Id: I60a44b7ba3c35c74561824c04b8dbe3e3039324c Signed-off-by: Julius Werner <jwerner@chromium.org>
-