1. 27 May, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: support rk3399 gpio driver · 9901dcf6
      Caesar Wang authored
      There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs
      on rk3399 platform.
      The pull direction(pullup or pulldown) for all of GPIOs are
      software-programmable.
      At the moment, we add the gpio basic driver since reset or power off
      the devices from gpio configuration for BL31.
      9901dcf6
  2. 20 May, 2016 1 commit
  3. 04 May, 2016 1 commit
  4. 25 Apr, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: fixes for the required · 0c05748b
      Caesar Wang authored
      
      
      This patch has the following change for rk3399.
      
      * Set the uart to 115200 since the loader decide to set
        uart baud to 115200Hz. So the ATF also should set uart baud to 115200.
      
      * We need ensure the bl31 base is greater than 4KB since there are have
        the shared mem for coreboot.(Note: the previous vesion was tested with uboot)
      
      Otherwise, we will happen the exception crash since the ddr area won't
      to work from the shared ram address in some cases.
      
      For example, the exception crash:
      CBFS: Found @ offset 19c80 size 24074
      exception _sync_sp_el0
      ELR = 0x0000000000008000
      ESR = 0x0000000002000000
      SPSR = 0x600003cc
      FAR = 0xffffffff00000000
      SP = 0x00000000ff8ed230
      ...
      X29 = 0x00000000ff8c1fc0
      X30 = 0x000000000030e3b0
      exception death
      
      Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      0c05748b
  5. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04