1. 08 Jun, 2020 1 commit
    • Tien Hock Loh's avatar
      plat: intel: Fix clock configuration bugs · fa09d544
      Tien Hock Loh authored
      
      
      This fixes a few issues on the Agilex clock configuration:
      - Set clock manager into boot mode before configuring clock
      - Fix wrong divisor used when calculating vcocalib
      - PLL sync configuration should be read and then written
      - Wait PLL lock after PLL sync configuration is done
      - Clear interrupt bits instead of set interrupt bits after configuration
      Signed-off-by: default avatarTien Hock Loh <tien.hock.loh@intel.com>
      Change-Id: I54c1dc5fe9b102e3bbc1237a92d8471173b8af70
      fa09d544
  2. 27 Feb, 2020 1 commit
  3. 25 Feb, 2020 3 commits
  4. 20 Feb, 2020 1 commit
  5. 07 Feb, 2020 1 commit
  6. 05 Feb, 2020 2 commits
  7. 03 Feb, 2020 1 commit
  8. 29 Jan, 2020 1 commit
  9. 28 Jan, 2020 1 commit
    • Madhukar Pappireddy's avatar
      Enable -Wredundant-decls warning check · ca661a00
      Madhukar Pappireddy authored
      
      
      This flag warns if anything is declared more than once in the same
      scope, even in cases where multiple declaration is valid and changes
      nothing.
      
      Consequently, this patch also fixes the issues reported by this
      flag. Consider the following two lines of code from two different source
      files(bl_common.h and bl31_plat_setup.c):
      
      IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
      IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE);
      
      The IMPORT_SYM macro which actually imports a linker symbol as a C expression.
      The macro defines the __RO_START__ as an extern variable twice, one for each
      instance. __RO_START__ symbol is defined by the linker script to mark the start
      of the Read-Only area of the memory map.
      
      Essentially, the platform code redefines the linker symbol with a different
      (relevant) name rather than using the standard symbol. A simple solution to
      fix this issue in the platform code for redundant declarations warning is
      to remove the second IMPORT_SYM and replace it with following assignment
      
      static const unsigned long BL2_RO_BASE = BL_CODE_BASE;
      
      Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      ca661a00
  10. 24 Jan, 2020 1 commit
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