1. 30 Aug, 2018 1 commit
    • Douglas Raillard's avatar
      backtrace: Introduce backtrace function · 0c62883f
      Douglas Raillard authored
      
      This function diplays the backtrace, the current EL and security state
      to allow a post-processing tool to choose the right binary to interpret
      the dump.
      
      The output can be fed to GNU addr2line to resolve function names given
      an ELF binary compiled with debug information. The "-i" flag is
      recommended to improve display in case of inlined functions. The *.dump
      files generated during the build process can also be used.
      
      The function works in AArch64 and AArch32. In AArch32 it only works in
      A32 mode (without T32 interworking), which is enforced in the Makefile.
      
      Sample output of a backtrace at EL3:
      
          BACKTRACE: START: function_name
          0: EL3: 0x798
          1: EL3: 0x538
          2: EL3: 0x550
          3: EL3: 0x55c
          4: EL3: 0x568
          5: EL3: 0x5a8
          6: EL3: 0xf4
          BACKTRACE: END: function_name
      
      In order to enable it the new option ENABLE_BACKTRACE must be set to 1.
      This option is set to 1 by default only in AArch64 debug builds. As
      usual, it can be overridden by the platform makefile and in the build
      command line.
      
      Change-Id: Icaff39b0e5188329728be2f3c72b868b2368e794
      Co-authored-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      Signed-off-by: default avatarDouglas Raillard <douglas.raillard@arm.com>
      0c62883f
  2. 22 Aug, 2018 2 commits
  3. 10 Aug, 2018 1 commit
  4. 11 Jul, 2018 1 commit
    • Roberto Vargas's avatar
      Add end_vector_entry assembler macro · a9203eda
      Roberto Vargas authored
      
      Check_vector_size checks if the size of the vector fits
      in the size reserved for it. This check creates problems in
      the Clang assembler. A new macro, end_vector_entry, is added
      and check_vector_size is deprecated.
      
      This new macro fills the current exception vector until the next
      exception vector. If the size of the current vector is bigger
      than 32 instructions then it gives an error.
      
      Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      a9203eda
  5. 12 Jun, 2018 2 commits
    • Daniel Boulby's avatar
      Fix MISRA Rule 5.3 Part 2 · 896a5902
      Daniel Boulby authored
      
      Use a _ prefix for Macro arguments to prevent that argument from
      hiding variables of the same name in the outer scope
      
      Rule 5.3: An identifier declared in an inner scope shall not
                hide an identifier declared in an outer scope
      
      Fixed For:
          make LOG_LEVEL=50 PLAT=fvp
      
      Change-Id: I67b6b05cbad4aeca65ce52981b4679b340604708
      Signed-off-by: default avatarDaniel Boulby <daniel.boulby@arm.com>
      896a5902
    • Daniel Boulby's avatar
      Fix MISRA Rule 5.3 Part 1 · d3775d46
      Daniel Boulby authored
      
      Conflict with function name and variable name within that function.
      Change the name of the function from image_size to get_image_size
      to remove conflict and make the function fit the normal project
      naming convention.
      
      Rule 5.3:  An identifier declared in an inner scope shall not
                 hide an identifier declared in an outer scope
      
      Fixed For:
          make LOG_LEVEL=50 PLAT=fvp
      
      Change-Id: I1a63d2730113e2741fffa79730459c584b0224d7
      Signed-off-by: default avatarDaniel Boulby <daniel.boulby@arm.com>
      d3775d46
  6. 08 Jun, 2018 1 commit
  7. 25 May, 2018 1 commit
  8. 18 May, 2018 1 commit
  9. 23 Apr, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Add support for the SMC Calling Convention 2.0 · 2f370465
      Antonio Nino Diaz authored
      
      Due to differences in the bitfields of the SMC IDs, it is not possible
      to support SMCCC 1.X and 2.0 at the same time.
      
      The behaviour of `SMCCC_MAJOR_VERSION` has changed. Now, it is a build
      option that specifies the major version of the SMCCC that the Trusted
      Firmware supports. The only two allowed values are 1 and 2, and it
      defaults to 1. The value of `SMCCC_MINOR_VERSION` is derived from it.
      
      Note: Support for SMCCC v2.0 is an experimental feature to enable
      prototyping of secure partition specifications. Support for this
      convention is disabled by default and could be removed without notice.
      
      Change-Id: I88abf9ccf08e9c66a13ce55c890edea54d9f16a7
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2f370465
  10. 27 Mar, 2018 1 commit
    • Joel Hutton's avatar
      Clean usage of void pointers to access symbols · 9f85f9e3
      Joel Hutton authored
      
      Void pointers have been used to access linker symbols, by declaring an
      extern pointer, then taking the address of it. This limits symbols
      values to aligned pointer values. To remove this restriction an
      IMPORT_SYM macro has been introduced, which declares it as a char
      pointer and casts it to the required type.
      
      Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
      Signed-off-by: default avatarJoel Hutton <Joel.Hutton@Arm.com>
      9f85f9e3
  11. 05 Mar, 2018 1 commit
  12. 28 Feb, 2018 1 commit
  13. 26 Feb, 2018 3 commits
    • Soby Mathew's avatar
      Dynamic cfg: MISRA fixes · da5f2745
      Soby Mathew authored
      
      Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      da5f2745
    • Soby Mathew's avatar
      ARM Platforms: Load HW_CONFIG in BL2 · cab0b5b0
      Soby Mathew authored
      The patch adds the necessary changes to load HW_CONFIG in BL2 for
      ARM Platforms :
      
      1. The load address of HW_CONFIG is specified via the `hw_config_addr`
      property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size`
      property defines the maximum size to be expected for the HW_CONFIG.
      The `arm_dyn_cfg_helpers.c` and corresponding header implements
      utility functions to parse these DT properties defined.
      The `arm_dyn_cfg.c` implements wrappers to these helpers to enable
      them to be invoked from ARM platform layer.
      
      2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is
      the list of images to be loaded by BL2.
      
      3. The `libfdt` sources are now included when BL2 is built
      
      4. A new helper `populate_next_bl_params_config()` is introduced in
      desc_image_load.c to populate the subsequent executable BL images
      with the `hw_config` and the corresponding `fw_config` if available.
      The `plat_get_next_bl_params()` API for ARM platforms is modified to
      invoke this new h...
      cab0b5b0
    • Soby Mathew's avatar
      Dynamic cfg: Introduce fdt wrappers · e5674e1f
      Soby Mathew authored
      
      Change-Id: I9b1cdaf2430a1998a69aa366ea1461224a3d43dc
      Co-Authoured-by: default avatarJeenu Viswambharan <Jeenu.Viswambharan@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      e5674e1f
  14. 01 Feb, 2018 1 commit
    • Masahiro Yamada's avatar
      image_decompress: add APIs for decompressing images · 2e379d2f
      Masahiro Yamada authored
      
      These APIs are used by platforms that need to decompress images.
      
      image_decompress_init():
        This registers a temporary buffer and a decompressor callback.
        This should be called from platform init code.
      
      image_decompress_prepare():
        This should be called before each compressed image is loaded.  The
        best location to call this will be bl*_plat_handle_pre_image_load().
      
      image_decompress():
        This should be called after each compressed image is loaded.  The
        best location to call this will be bl*_plat_handle_post_image_load().
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      2e379d2f
  15. 15 Dec, 2017 1 commit
  16. 05 Dec, 2017 1 commit
    • Soby Mathew's avatar
      Unify cache flush code path after image load · 76163b3a
      Soby Mathew authored
      
      Previously the cache flush happened in 2 different places in code
      depending on whether TRUSTED_BOARD_BOOT is enabled or not. This
      patch unifies this code path for both the cases. The `load_image()`
      function is now made an internal static function.
      
      Change-Id: I96a1da29d29236bbc34b1c95053e6a9a7fc98a54
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      76163b3a
  17. 08 Nov, 2017 1 commit
    • Etienne Carriere's avatar
      ARMv7 may not support Virtualization Extensions · 64cc6e91
      Etienne Carriere authored
      
      ARMv7-A Virtualization extensions brings new instructions and resources
      that were supported by later architectures. Reference ARM ARM Issue C.c
      [DDI0406C_C].
      
      ERET and extended MSR/MRS instructions, as specified in [DDI0406C_C] in
      ID_PFR1 description of bits[15:12] (Virtualization Extensions):
       A value of 0b0001 implies implementation of the HVC, ERET, MRS
       (Banked register), and MSR (Banked register) instructions. The ID_ISARs
       do not identify whether these instructions are implemented.
      
      UDIV/SDIV were introduced with the Virtualization extensions, even if
      not strictly related to the virtualization extensions.
      
      If ARMv7 based platform does not set ARM_CORTEX_Ax=yes, platform
      shall define ARMV7_SUPPORTS_VIRTUALIZATION to enable virtualization
      extension related resources.
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      64cc6e91
  18. 01 Nov, 2017 1 commit
  19. 24 Oct, 2017 1 commit
  20. 11 Sep, 2017 2 commits
    • Soby Mathew's avatar
      Implement log framework · 7f56e9a3
      Soby Mathew authored
      
      This patch gives users control over logging messages printed from the C
      code using the LOG macros defined in debug.h Users now have the ability
      to reduce the log_level at run time using the tf_log_set_max_level()
      function. The default prefix string can be defined by platform by
      overriding the `plat_log_get_prefix()` platform API which is also
      introduced in this patch.
      
      The new log framework results in saving of some RO data. For example,
      when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted
      in saving 384 bytes of RO data and increase of 8 bytes of RW data. The
      framework also adds about 108 bytes of code to the release build of FVP.
      
      Fixes ARM-software/tf-issues#462
      
      Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554
      Co-authored-by: default avatarEleanor Bonnici <Eleanor.bonnici@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      7f56e9a3
    • Soby Mathew's avatar
      Introduce tf_vprintf() and tf_string_print() · 2d7e8282
      Soby Mathew authored
      
      This patch introduces tf_vprintf() and tf_string_print() APIs
      which is needed by the logging framework introduced in a later
      patch.
      
      Change-Id: Ie4240443d0e04e070502b51e371e546dd469fd33
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      2d7e8282
  21. 21 Aug, 2017 1 commit
    • Julius Werner's avatar
      Fix x30 reporting for unhandled exceptions · 4d91838b
      Julius Werner authored
      
      Some error paths that lead to a crash dump will overwrite the value in
      the x30 register by calling functions with the no_ret macro, which
      resolves to a BL instruction. This is not very useful and not what the
      reader would expect, since a crash dump should usually show all
      registers in the state they were in when the exception happened. This
      patch replaces the offending function calls with a B instruction to
      preserve the value in x30.
      
      Change-Id: I2a3636f2943f79bab0cd911f89d070012e697c2a
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      4d91838b
  22. 14 Jun, 2017 1 commit
  23. 24 May, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Introduce `tf_snprintf` · da5241cb
      Antonio Nino Diaz authored
      
      This is a reduced version of `snprintf` that only supports formats '%d',
      '%i' and '%u'. It can be used when the full `snprintf` is not needed in
      order to save memory. If it finds an unknown format specifier, it
      prints an error message and panics.
      
      Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      da5241cb
  24. 15 May, 2017 1 commit
  25. 03 May, 2017 1 commit
  26. 26 Apr, 2017 1 commit
  27. 20 Apr, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Remove build option `ASM_ASSERTION` · 044bb2fa
      Antonio Nino Diaz authored
      
      The build option `ENABLE_ASSERTIONS` should be used instead. That way
      both C and ASM assertions can be enabled or disabled together.
      
      All occurrences of `ASM_ASSERTION` in common code and ARM platforms have
      been replaced by `ENABLE_ASSERTIONS`.
      
      ASM_ASSERTION has been removed from the user guide.
      
      Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      044bb2fa
  28. 19 Apr, 2017 2 commits
    • Dan Handley's avatar
      Minor refactor of BL2 image load v2 · c2a9ee63
      Dan Handley authored
      
      Previously, get_next_bl_params_from_mem_params_desc() populated arg0
      in the EL3 runtime entrypoint with a bl_params_t pointer. This is the
      responsibility of the generic LOAD_IMAGE_V2 framework instead of the
      descriptor-based image loading utility functions. Therefore this patch
      moves that code to bl2_load_images().
      
      Also, this patch moves the code that flushes the bl_params structure to
      flush_bl_params_desc(), together with the other descriptor-based image
      loading flushing code.
      
      Change-Id: I4541e3f50e3878dde7cf89e9e8f31fe0b173fb9d
      Signed-off-by: default avatarDan Handley <dan.handley@arm.com>
      c2a9ee63
    • Antonio Nino Diaz's avatar
      Add `ENABLE_ASSERTIONS` build option · cc8b5632
      Antonio Nino Diaz authored
      
      Add the new build option `ENABLE_ASSERTIONS` that controls whether or
      not assert functions are compiled out. It defaults to 1 for debug builds
      and to 0 for release builds.
      
      Additionally, a following patch will be done to allow this build option
      to hide auxiliary code used for the checks done in an `assert()`. This
      code is is currently under the DEBUG build flag.
      
      Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO,
      which is the default for debug builds.
      
      This patch also updates the User Guide.
      
      Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      cc8b5632
  29. 31 Mar, 2017 2 commits
  30. 08 Mar, 2017 1 commit
  31. 06 Feb, 2017 1 commit
    • Douglas Raillard's avatar
      Introduce unified API to zero memory · 308d359b
      Douglas Raillard authored
      
      Introduce zeromem_dczva function on AArch64 that can handle unaligned
      addresses and make use of DC ZVA instruction to zero a whole block at a
      time. This zeroing takes place directly in the cache to speed it up
      without doing external memory access.
      
      Remove the zeromem16 function on AArch64 and replace it with an alias to
      zeromem. This zeromem16 function is now deprecated.
      
      Remove the 16-bytes alignment constraint on __BSS_START__ in
      firmware-design.md as it is now not mandatory anymore (it used to comply
      with zeromem16 requirements).
      
      Change the 16-bytes alignment constraints in SP min's linker script to a
      8-bytes alignment constraint as the AArch32 zeromem implementation is now
      more efficient on 8-bytes aligned addresses.
      
      Introduce zero_normalmem and zeromem helpers in platform agnostic header
      that are implemented this way:
      * AArch32:
      	* zero_normalmem: zero using usual data access
      	* zeromem: alias for zero_normalmem
      * AArch64:
      	* zero_normalmem: zero normal memory  using DC ZVA instruction
      	                  (needs MMU enabled)
      	* zeromem: zero using usual data access
      
      Usage guidelines: in most cases, zero_normalmem should be preferred.
      
      There are 2 scenarios where zeromem (or memset) must be used instead:
      * Code that must run with MMU disabled (which means all memory is
        considered device memory for data accesses).
      * Code that fills device memory with null bytes.
      
      Optionally, the following rule can be applied if performance is
      important:
      * Code zeroing small areas (few bytes) that are not secrets should use
        memset to take advantage of compiler optimizations.
      
        Note: Code zeroing security-related critical information should use
        zero_normalmem/zeromem instead of memset to avoid removal by
        compilers' optimizations in some cases or misbehaving versions of GCC.
      
      Fixes ARM-software/tf-issues#408
      
      Change-Id: Iafd9663fc1070413c3e1904e54091cf60effaa82
      Signed-off-by: default avatarDouglas Raillard <douglas.raillard@arm.com>
      308d359b
  32. 20 Dec, 2016 1 commit
  33. 19 Dec, 2016 1 commit