1. 23 Dec, 2020 1 commit
    • Nishanth Menon's avatar
      ti: k3: Move USE_COHERENT_MEM only for the generic board · ff7b75e2
      Nishanth Menon authored
      commit 65f7b817
      
       ("ti: k3: common: Use coherent memory for shared data")
      introduced WARMBOOT_ENABLE_DCACHE_EARLY and USE_COHERENT_MEM to handle
      multiple clusters across L3 cache systems. This is represented by
      "generic" board in k3 platform.
      
      On "lite" platforms, however, system level coherency is lacking since
      we don't have a global monitor or an L3 cache controller. Though, at
      a cluster level, ARM CPU level coherency is very much possible since
      the max number of clusters permitted in lite platform configuration is
      "1".
      
      However, we need to be able to disable USE_COHERENT_MEM for the lite
      configuration due to the lack of system level coherency.
      
      See docs/getting_started/build-options.rst for further information.
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      Change-Id: I4a0ec150b3f9ea12369254aef834a6cbe82d6be6
      ff7b75e2
  2. 27 Jan, 2020 1 commit
    • Andrew F. Davis's avatar
      ti: k3: common: Enable ARM cluster power down · 586621f1
      Andrew F. Davis authored
      
      
      When all cores in a cluster are powered down the parent cluster can
      be also powered down. When the last core has requested powering down
      follow by sending the cluster power down sequence to the system
      power controller firmware.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      Change-Id: I0ffeb339852c66ef62743aecd3e17ca20bad6216
      586621f1
  3. 24 Jan, 2020 1 commit
  4. 30 Apr, 2019 1 commit
    • Andrew F. Davis's avatar
      ti: k3: common: Remove MSMC port definitions · a82bf5ad
      Andrew F. Davis authored
      
      
      The MSMC port defines were added to help in the case when some ports
      are not connected and have no cores attached. We can get the same
      functionality by defined the number of cores on that port to zero.
      This simplifies several code paths, do this here.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      Change-Id: I3247fe37af7b86c3227e647b4f617fab70c8ee8a
      a82bf5ad
  5. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  6. 22 Aug, 2018 1 commit
  7. 20 Jul, 2018 1 commit
  8. 19 Jun, 2018 1 commit