1. 16 May, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Add build configuration for timer save/restore · 2da8d8bf
      Jeenu Viswambharan authored
      At present, non-secure timer register contents are saved and restored as
      part of world switch by BL3-1. This effectively means that the
      non-secure timer stops, and non-secure timer interrupts are prevented
      from asserting until BL3-1 switches back, introducing latency for
      non-secure services. Often, secure world might depend on alternate
      sources for secure interrupts (secure timer or platform timer) instead
      of non-secure timers, in which case this save and restore is
      unnecessary.
      
      This patch introduces a boolean build-time configuration NS_TIMER_SWITCH
      to choose whether or not to save and restore non-secure timer registers
      upon world switch. The default choice is made not to save and restore
      them.
      
      Fixes ARM-software/tf-issues#148
      
      Change-Id: I1b9d623606acb9797c3e0b02fb5ec7c0a414f37e
      2da8d8bf
  2. 06 May, 2014 1 commit
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
  3. 26 Mar, 2014 1 commit
    • Andrew Thoelke's avatar
      Place assembler functions in separate sections · 0a30cf54
      Andrew Thoelke authored
      This extends the --gc-sections behaviour to the many assembler
      support functions in the firmware images by placing each function
      into its own code section. This is achieved by creating a 'func'
      macro used to declare each function label.
      
      Fixes ARM-software/tf-issues#80
      
      Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
      0a30cf54
  4. 17 Feb, 2014 1 commit
    • Achin Gupta's avatar
      Add helper library for cpu context management · 9ac63c59
      Achin Gupta authored
      This patch introduces functions for saving and restoring shared system
      registers between secure and non-secure EL1 exception levels, VFP
      registers and essential EL3 system register and other state. It also
      defines the 'cpu_context' data structure which will used for saving and
      restoring execution context for a given security state. These functions
      will allow runtime services like PSCI and Secure payload dispatcher to
      implement logic for switching between the secure and non-secure states.
      
      The save and restore functions follow AArch64 PCS and only use
      caller-saved temporary registers.
      
      Change-Id: I8ee3aaa061d3caaedb28ae2c5becb9a206b6fd74
      9ac63c59