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Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
Varun Wadekar authored 
This patch enables L2 ECC and Parity Protection for ARM Cortex-A57 CPUs
for Tegra SoCs.

Change-Id: I038fcd529991d0201a4951ce2730ab71b1c980f9
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
018b8480
Name Last commit Last update
bl1 Introduce unified API to zero memory
bl2 Introduce unified API to zero memory
bl2u Introduce unified API to zero memory
bl31 Introduce unified API to zero memory
bl32 Replace some memset call by zeromem
common Introduce unified API to zero memory
docs Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
drivers Merge pull request #844 from antonio-nino-diaz-arm/an/no-timingsafe
fdts Fix incorrect copyright notices
include Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
lib cpus: denver: remove barrier from denver_enable_dco()
make_helpers Introduce locking primitives using CAS instruction
plat Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
services spd: trusty: OEN_TAP_START aperture for standard calls
tools Merge pull request #833 from masahir0y/cert_create
.checkpatch.conf Mandate 'Signed-off-by' line in commit messages
.gitignore gitignore: ignore GNU GLOBAL tag files
Makefile Merge pull request #843 from jeenu-arm/cas-lock
acknowledgements.md Add Xilinx to acknowledgements file
contributing.md Drop requirement for CLA in contribution.md
dco.txt Drop requirement for CLA in contribution.md
license.md Update year in copyright text to 2014
readme.md readme.md: Add tested Linaro release information for FVPs