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errata: workaround for Neoverse V1 errata 1852267
laurenw-arm authored 
Neoverse V1 erratum 1852267 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: default avatarLauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ide5e0bc09371fbc91c2385ffdff74e604beb2dbe
143b1965
Name Last commit Last update
.husky build(hooks): add commitlint hook
bl1 Add PIE support for AARCH32
bl2 Add PIE support for AARCH32
bl2u Avoid the use of linker *_SIZE__ macros
bl31 SMCCC/PCI: Handle std svc boilerplate
bl32 Add PIE support for AARCH32
common fix(fdt): fix OOB write in uuid parsing function
docs errata: workaround for Neoverse V1 errata 1852267
drivers Merge "fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif" into integration
fdts Merge changes from topic "tc0_tfa_v25" into integration
include errata: workaround for Neoverse V1 errata 1852267
lib errata: workaround for Neoverse V1 errata 1852267
licenses docs(license): rectify `arm-gic.h` license
make_helpers feat(sve): enable SVE for the secure world
plat fix(plat/fvp): provide boot files via semihosting
services services: Fix pmr_el1 rewrote issue in sdei_disaptch_event()
tools fix(tools/stm32image): improve the tool
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch
.cz.json build(hooks): add Commitizen hook
.editorconfig .editorconfig: set max line length to 100
.gitignore build(hooks): add Husky configuration
.gitreview Specify integration as the default branch for git-review
Makefile Merge changes from topic "sb/measured-boot" into integration
commitlint.config.js revert(commitlint): disable `signed-off-by` rule
dco.txt Drop requirement for CLA in contribution.md
license.rst
package-lock.json
package.json
readme.rst
readme.rst

Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.

Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.