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Workaround for Cortex A78 erratum 1951500
johpow01 authored 
Cortex A78 erratum 1951500 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1.  The workaround is to insert a DMB ST before
acquire atomic instructions without release semantics.  This workaround
works on revisions r1p0 and r1p1, in r0p0 there is no workaround.

SDEN can be found here:
https://documentation-service.arm.com/static/5fb66157ca04df4095c1cc2e

Signed-off-by: default avatarJohn Powell <john.powell@arm.com>
Change-Id: I47610cee75af6a127ea65edc4d5cffc7e6a2d0a3
3a2710dc
Name Last commit Last update
..
aarch32 TF-A Aarch32: optimise memcpy4()
aarch64 AArch64: Fix assertions in processing dynamic relocations
bl_aux_params Introduce lightweight BL platform parameter library
compiler-rt compiler_rt: Import popcountdi2.c and popcountsi2.c files
coreboot Update in coreboot_get_memory_type API to include size as well
cpus Workaround for Cortex A78 erratum 1951500
debugfs cert_create: add Platform owned secure partitions support
el3_runtime Aarch64: Add support for FEAT_MTE3
extensions Add support for FEAT_MTPMU for Armv8.6
fconf lib: fconf: Implement a parser to populate CoT
libc Don't return error information from console_flush
libfdt libfdt: Upgrade libfdt source files
locks locks: bakery: use is_dcache_enabled() helper
optee Coverity: remove unnecessary header file includes
pmf Sanitise includes across codebase
psci PSCI: fix limit of 256 CPUs caused by cast to unsigned char
romlib Use abspath to dereference $BUILD_BASE
semihosting MISRA cleanup in mem_region and semihosting files
stack_protector Disable stack protection explicitly
utils MISRA cleanup in mem_region and semihosting files
xlat_tables Aarch32 xlat_tables lib: Fix MISRA-2012 defects
xlat_tables_v2 Increase type widths to satisfy width requirements
zlib Sanitise includes across codebase