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Loh Tien Hock
authored
A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.
Signed-off-by: 
Loh Tien Hock <tien.hock.loh@intel.com>| Name | Last commit | Last update |
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