ti: k3: common: Make plat_get_syscnt_freq2 check CNT_FID0 GTC reg
Nishanth Menon authored
ARM's generic timer[1] picks up it's graycode from GTC. However, the
frequency of the GTC is supposed to be programmed in CNTFID0[2]
register.

In K3, architecture, GTC provides a central time to many parts of the
SoC including graycode to the generic timer in the ARMv8 subsystem.
However, due to the central nature and the need to enable the counter
early in the boot process, the R5 based bootloader enables GTC and
programs it's frequency based on central needs of the system. This
may not be a constant 200MHz based on the system. The bootloader is
supposed to program the FID0 register with the correct frequency it
has sourced for GTC from the central system controller, and TF-A is
supposed to use that as the frequency for it's local timer.

A mismatch in programmed frequency and what we program for generic
timer will, as we can imagine, all kind of weird mayhem.

So, check the CNTFID0 register, if it is 0, warn and use the default
frequency to continue the boot process.

While at it, we can also check CNTCR register to provide some basic
diagnostics to make sure that we don't have OS folks scratch their
heads. Even though this is used during cpu online operations, the cost
of this additional check is minimal enough for us not to use #ifdeffery
with DEBUG flags.

[1] https://developer.arm.com/documentation/100095/0002/generic-timer/generic-timer-register-summary/aarch64-generic-timer-register-summary
[2] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntfid0
[3] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntcr

Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Change-Id: Ib03e06788580f3540dcb1a11677d0d6d398b2c9f
6a22d9ea
Name Last commit Last update
bl1 Add support for FEAT_MTPMU for Armv8.6
bl2 Add support for FEAT_MTPMU for Armv8.6
bl2u linker_script: move .data section to bl_common.ld.h
bl31 Add support for FEAT_MTPMU for Armv8.6
bl32 Add support for FEAT_MTPMU for Armv8.6
common Merge "Increase type widths to satisfy width requirements" into integration
docs maintainers: Update maintainers for TI port
drivers rcar_gen3: drivers: console: Treat log as device memory
fdts fdts: tc0: Add reserved-memory node for OP-TEE
include Merge changes I0c5f32e8,Id49c124c,Idcfe933d into integration
lib PSCI: fix limit of 256 CPUs caused by cast to unsigned char
make_helpers Merge "Add support for FEAT_MTPMU for Armv8.6" into integration
plat ti: k3: common: Make plat_get_syscnt_freq2 check CNT_FID0 GTC reg
services Aarch64: Add support for FEAT_PANx extensions
tools Update makefile to build fiptool for Windows
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch
.editorconfig .editorconfig: set max line length to 100
.gitignore Ignore the ctags file
.gitreview Specify integration as the default branch for git-review
Makefile Merge "Add support for FEAT_MTPMU for Armv8.6" into integration
dco.txt Drop requirement for CLA in contribution.md
license.rst doc: De-duplicate readme and license files
readme.rst doc: Formatting fixes for readme.rst

Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

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In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

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