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uart: 16550: Fix getc
Nishanth Menon authored
tbz check for RDR status is to check for a bit being zero.
Unfortunately, we are using a mask rather than the bit position.

Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf

 (page 17),
LSR register bit 0 is Data ready status (RDR), not bit position 2.

Update the same to match the specification.
Reported-by: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
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