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Sumit Garg
authored
BL31 runs from SRAM which is a non-coherent memory on synquacer. So
enable MMU with SRAM memory marked as Non-Cacheable and mark page tables
kept on SRAM as Non-Cacheable via XLAT_TABLE_NC flag. Also add page tables
for Device address space.
Signed-off-by: 
Sumit Garg <sumit.garg@linaro.org>| Name | Last commit | Last update |
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