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rockchip: rk3399: configure the DDR secure region for BL31 image
Xing Zheng authored 
Move the BL31 loaded base address 0x10000 to 0x1000, and configure
the the memory range 0~1MB is secure, the goal is that make sure
the BL31 image will be not modified.
Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
941c7147
Name Last commit Last update
bl1 Report errata workaround status to console
bl2 Define and use no_ret macro where no return is expected
bl2u Define and use no_ret macro where no return is expected
bl31 Define and use no_ret macro where no return is expected
bl32 Abort preempted TSP STD SMC after PSCI CPU suspend
common Merge pull request #791 from jeenu-arm/asm-assert-32
docs Merge pull request #821 from jeenu-arm/errata-printing
drivers tbbr: Use constant-time bcmp() to compare hashes
fdts Fix incorrect copyright notices
include Merge pull request #821 from jeenu-arm/errata-printing
lib Report errata workaround status to console
make_helpers fiptool: support --align option to add desired alignment to image offset
plat rockchip: rk3399: configure the DDR secure region for BL31 image
services Resolve build errors flagged by GCC 6.2
tools fiptool: support --align option to add desired alignment to image offset
.checkpatch.conf Mandate 'Signed-off-by' line in commit messages
.gitignore .gitignore: ignore editor backup files
Makefile Merge pull request #821 from jeenu-arm/errata-printing
acknowledgements.md Add Xilinx to acknowledgements file
contributing.md Drop requirement for CLA in contribution.md
dco.txt Drop requirement for CLA in contribution.md
license.md Update year in copyright text to 2014
readme.md readme.md: Add tested Linaro release information for FVPs