Skip to content

GitLab

Switch branch/tag
History Find file
Clone
errata: workaround for Cortex-A710 errata 2081180
nayanpatel-arm authored 
Cortex-A710 erratum 2081180 is a Cat B erratum present in r0p0, r1p0,
and r2p0 of the Cortex-A710 processor core, and it is still open.

A710 SDEN: https://developer.arm.com/documentation/SDEN1775101/1000

Signed-off-by: default avatarnayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I1e8c2bc3d8dc326947ccfd91daf9083d666b2542
a64bcc2b
Name Last commit Last update
.husky build(hooks): add commitlint hook
bl1 Add PIE support for AARCH32
bl2 feat(fwu): initialize FWU driver in BL2
bl2u Avoid the use of linker *_SIZE__ macros
bl31 SMCCC/PCI: Handle std svc boilerplate
bl32 Add PIE support for AARCH32
common refactor(hw_crc32): renamed hw_crc32 to tf_crc32
docs errata: workaround for Cortex-A710 errata 2081180
drivers Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration
fdts feat(plat/arm): Introduce TC1 platform
include refactor(plat/ea_handler): Use default ea handler implementation for panic
lib errata: workaround for Cortex-A710 errata 2081180
licenses docs(license): rectify `arm-gic.h` license
make_helpers feat(fwu): initialize FWU driver in BL2
plat Merge "fix(plat/arm_fpga): enable AMU extension" into integration
services services: Fix pmr_el1 rewrote issue in sdei_disaptch_event()
tools fix(tools/stm32image): improve the tool
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch
.cz.json build(hooks): add Commitizen hook
.editorconfig .editorconfig: set max line length to 100
.gitignore build(hooks): add Husky configuration
.gitreview Specify integration as the default branch for git-review
Makefile feat(fwu): initialize FWU driver in BL2
commitlint.config.js revert(commitlint): disable `signed-off-by` rule
dco.txt Drop requirement for CLA in contribution.md
license.rst
package-lock.json
package.json
readme.rst
readme.rst

Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.

Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.